Abstract: A storage system is provided that includes a top, a bottom, a front, a back, a left side wall, and a right side wall. A storage area is defined by the top, bottom, left and right side walls. A plurality of full shelves are located within the storage area and extend between the left and right side walls. A plurality of partial shelves are located within the storage area, some of the partial shelves extend from the left side wall and some of the partial shelves extend from the right side wall. Removable handles are located on the left and right side walls. A skirt extends around at least a portion of a lower side of the bottom.

Abstract: An audio processing method may involve receiving output signals from each microphone of a plurality of microphones in an audio environment, the output signals corresponding to a current utterance of a person and determining, based on the output signals, one or more aspects of context information relating to the person, including an estimated current proximity of the person to one or more microphone locations. The method may involve selecting two or more loudspeaker-equipped audio devices based, at least in part, on the one or more aspects of the context information, determining one or more types of audio processing changes to apply to audio data being rendered to loudspeaker feed signals for the audio devices and causing one or more types of audio processing changes to be applied. In some examples, the audio processing changes have the effect of increasing a speech to echo ratio at one or more microphones.

Abstract: An audio session management method may involve: determining, by an audio session manager, one or more first media engine capabilities of a first media engine of a first smart audio device, the first media engine being configured for managing one or more audio media streams received by the first smart audio device and for performing first smart audio device signal processing for the one or more audio media streams according to a first media engine sample clock; receiving, by the audio session manager and via a first application communication link, first application control signals from the first application; and controlling the first smart audio device according to the first media engine capabilities, by the audio session manager, via first audio session management control signals transmitted to the first smart audio device via a first smart audio device communication link and without reference to the first media engine sample clock.

Abstract: Disclosed are embodiments of battery stacker machines, including z-fold stacker machines, configured to provide a rolling transfer of a battery layer so as to reduce scrubbing. In some embodiments, the layer is flexed onto an arcuate surface using a vacuum or other force. The arcuate surface is then rotated to release the layer at a desired transfer location. For instance, the desired transfer location may be on top of a stack or onto another arcuate gripper surface.

Abstract: An audio session management method may involve: determining, by an audio session manager, one or more first media engine capabilities of a first media engine of a first smart audio device, the first media engine being configured for managing one or more audio media streams received by the first smart audio device and for performing first smart audio device signal processing for the one or more audio media streams according to a first media engine sample clock; receiving, by the audio session manager and via a first application communication link, first application control signals from the first application; and controlling the first smart audio device according to the first media engine capabilities, by the audio session manager, via first audio session management control signals transmitted to the first smart audio device via a first smart audio device communication link and without reference to the first media engine sample clock.

Abstract: A method for debugging a processor which is executing vertices of a software application is described. Each vertex is assigned to a programming thread of the processor. The processor has debug hardware for raising exceptions in certain break conditions. The method comprises inspecting a vertex identifier, comparing the vertex identifier and raising an instruction exception event for the programming thread if the vertex identifier assigned to the thread matches the vertex break identifier in the debug hardware. Exceptions are raised based on identified vertices, rather than just individual instructions or instruction addresses.

Abstract: A method of treating an autoimmune disease and/or inflammatory condition in a subject, whereby the subject in need thereof is administered, via the oral mucosa, a rapidly infusing composition that includes (a) a pharmaceutically acceptable binder and/or excipient system containing gelatin and a sugar alcohol, and (b) a therapeutically effective amount of cannabidiol (CBD) or a derivative/analog thereof. The autoimmune disease and/or inflammatory condition may include, inter alia, rheumatoid arthritis, psoriasis, systemic lupus erythematosus, type-I diabetes, multiple sclerosis, Guillain-Barre syndrome, Crohn's disease, and ulcerative colitis, including refractory diseases/conditions thereof.

Abstract: A rapidly infusing composition that includes a pharmaceutically acceptable binder and/or excipient system containing gelatin and a sugar alcohol, and methotrexate. Also provided is a method of treating an autoimmune disease and/or inflammatory condition in a subject, whereby the subject in need thereof is administered, via the oral mucosa, the rapidly infusing composition. The autoimmune disease and/or inflammatory condition may include, inter alia, rheumatoid arthritis, dermatomyositis, psoriasis, systemic lupus erythematosus, eczema, vasculitis, psoriatic arthritis, type-Ii diabetes, multiple sclerosis, Crohn's disease, ulcerative colitis, and sarcoidosis, including refractory/diseases/conditions thereof.

Abstract: A processor comprising at least one processing module, each processing module comprising: an execution pipeline; memory; an instruction fetch unit comprising operable to switch between an operational mode and a debugging mode, the instruction fetch unit being configured so as, when in the operational mode, to fetch machine code instructions from the memory into the execution pipeline to be executed; and a debug interface for connecting to a debug adapter. The debug interface comprises a debug instruction register enabling the debug adapter to write a machine code instruction to the debug instruction register, and wherein the instruction fetch unit is configured so as, when in the debug mode, to fetch instructions from the debug instruction register into the pipeline instead of from the memory.

Abstract: Two or more die are stacked together in a stacked integrated circuit device. Each of the processors on these die is able to communicate with other processors on its die by sending data over the switching fabric of its respective die. The mechanism for sending data between processors on the same die (i.e. intradie communication) is reused for sending data between processors on different die (i.e. interdie communication). The reuse of the mechanism is enabled by assigning each processor a vertical neighbour on its opposing die. Each processor has an interdie connection that connects it to the output exchange bus of its neighbour. A processor is able to borrow the output exchange bus of its neighbour by sending data along the output exchange bus of its neighbour.

Abstract: A communication system employed during wellbore operations, such as during drilling, cementing, fracturing, or other wellbore operations, which utilizes ultrasound (i.e., acoustic waves characterized by ultrasonic frequencies) to communicate sensor and/or control information from inside a riser and/or blowout preventer (BOP) to outside the riser/BOP, and/or vice versa. More specifically, the communication system may include an internal ultrasonic module (IUM) residing inside the riser/BOP and acoustically coupled to a drill string and/or a centralizer also inside the riser/BOP. The communication system may further include an external ultrasonic module (EUM) residing outside the riser/BOP and acoustically coupled to the riser/BOP.

Abstract: A multitile processing system has an execution unit on each tile, and an interconnect which conducts communications between the tiles according to a bulk synchronous parallel scheme. Each tile performs an on-tile compute phase followed by an intertile exchange phase, where the exchange phase is held back until all tiles in a particular group have completed the compute phase. On completion of the compute phase, each tile generates a synchronisation request and pauses an issue of instructions until it receives a synchronisation acknowledgement. If a tile attains an excepted state, it raises an exception signal and pauses instruction issue until the excepted state has been resolved. However, tiles which are not in the excepted state can continue to perform their on-tile computer phase, and will issue their own synchronisation request in their own normal time frame.

Abstract: For certain applications, parts of the application data held in memory of a processing device (e.g. that are produced as a result of operations performed by the execution unit) are arranged in regular repeating patterns in the memory, and therefore, the execution unit may set up a suitable striding pattern for use by a send engine. The send engine accesses the memory at locations in accordance with the configured striding pattern so as to access a plurality of items of data that are arranged together in a regular pattern. In a similar manner as done for sends, the execution may set up a striding pattern for use by a receive engine. The receive engine, upon receiving a plurality of items of data, causes those items of data to be stored at locations in the memory, as determined in accordance with the configured striding pattern.

Abstract: A processing system comprising multiple tiles and an interconnect between the tiles. The interconnect is used to communicate between a group of some or all of the tiles according to a bulk synchronous parallel scheme, whereby each tile in the group performs an on-tile compute phase followed by an inter-tile exchange phase with the exchange phase being held back until all tiles in the group have completed the compute phase. Each tile in the group has a local exit state upon completion of the compute phase. The instruction set comprises a synchronization instruction for execution by each tile upon completion of its compute phase to signal a sync request to logic in the interconnect. In response to receiving the sync request from all the tiles in the group, the logic releases the next exchange phase and also makes available an aggregated a state of all the tiles in the group.

Abstract: The invention relates to a device for collecting and containing dirt or fluid. An apparatus comprising: hollow chamber (1); first actuator with scooping mechanism (5) which when retracted is proximate to the rim edge (4), and which when extended is proximate to the centre of the chamber opening; second actuator comprising holding or attachment member (7), which is moveable back and forth (on tracks 8) between distal and proximal ends; store of disposable containment tube material, held by the holding member. Methods of controlling a cleaning device, which allow for use of the device, using the containment tube for multiple actions, and disposing of the containment tube. A first embodiment (FIGS. 1, 6 & 7) has a double scoop mechanism (5) which is connected to the rim (4) by resilient (bridging members 6), with a disposable containment tube (10) drawn over the opening (FIG. 3). A second embodiment (FIGS. 2, 6 & 7) has triple arcuate scoop members (5) that are connected to rim (4).

Abstract: A processing system comprising an arrangement of tiles and an interconnect between the tiles. The interconnect comprises synchronization logic for coordinating a barrier synchronization to be performed between a group of the tiles. The instruction set comprises a synchronization instruction taking an operand which selects one of a plurality of available modes each specifying a different membership of the group. Execution of the synchronization instruction cause a synchronization request to be transmitted from the respective tile to the synchronization logic, and instruction issue to be suspended on the respective tile pending a synchronization acknowledgement being received back from the synchronization logic. In response to receiving the synchronization request from all the tiles in the group as specified by the operand of the synchronization instruction, the synchronization logic returns the synchronization acknowledgment to the tiles in the specified group.

Abstract: A processor is disclosed including: a barrel-threaded execution unit for executing concurrent threads, and a repeat cache shared between the concurrent threads. The processor's instruction set includes a repeat instruction which takes a repeat count operand. When the repeat cache is not claimed and the repeat instruction is executed in a first thread, a portion of code is cached from the first thread into the repeat cache, the state of the repeat cache is changed to record it as claimed, and the cached code is executed a number of times. When the repeat instruction is then executed in a further thread, then the already-cached portion of code is again executed a respective number of times, each time from the repeat cache. For each of the first and further instructions, the repeat count operand in the respective instruction specifies the number of times to execute the cached code.

Abstract: A communication system employed during wellbore operations, such as during drilling, cementing, fracturing, or other wellbore operations, which utilizes ultrasound (i.e., acoustic waves characterized by ultrasonic frequencies) to communicate sensor and/or control information from inside a riser and/or blowout preventer (BOP) to outside the riser/BOP, and/or vice versa. More specifically, the communication system may include an internal ultrasonic module (IUM) residing inside the riser/BOP and acoustically coupled to a drill string and/or a centralizer also inside the riser/BOP. The communication system may further include an external ultrasonic module (EUM) residing outside the riser/BOP and acoustically coupled to the riser/BOP.

Abstract: A method for debugging a processor which is executing vertices of a software application is described. Each vertex is assigned to a programming thread of the processor. The processor has debug hardware for raising exceptions in certain break conditions. The method comprises inspecting a vertex identifier, comparing the vertex identifier and raising an instruction exception event for the programming thread if the vertex identifier assigned to the thread matches the vertex break identifier in the debug hardware. Exceptions are raised based on identified vertices, rather than just individual instructions or instruction addresses.

Abstract: A processor having an instruction set including a load-store instruction having operands specifying, from amongst the registers in at least one register file, a respective destination of each of two load operations, a respective source of a store operation, and a pair of address registers arranged to hold three memory addresses, the three memory addresses being a respective load address for each of the two load operations and a respective store address for the store operation. The load-store instruction further includes three stride operands each specifying a respective stride value for each of the two load addresses and one store address, wherein at least some possible values of each stride operand specify the respective stride value by specifying one of a plurality of fields within a stride register in one of the one or more register files, each field holding a different stride value.