Abstract: A plasma processing system that includes a plasma processing chamber that provides enhanced control over an etch process is disclosed. The plasma processing chamber is connected to a gas flow system. The gas flow system can be employed to control the release of gases into different regions within the plasma processing chamber. In addition, the volume of the released gas, e.g., the flow rate of the gas, can be adjusted by a gas flow control mechanism. In this manner, both the position and the amount of the gas that is delivered to the plasma processing chamber can be controlled. The ability to adjust the position and the amount of gas that is released into the plasma processing chamber provides for a better control over the distribution of the neutral components. This in turn enhances control over the etching process.

Abstract: An antenna arrangement for generating an electric field inside a process chamber is provided. Generally, the antenna arrangement comprises a first loop disposed around an antenna axis. The first loop comprises a first turn with a first turn gap; a second turn with a second turn gap, where the second turn is concentric and coplanar with the first turn and spaced apart from the first turn, and where the antenna axis passes through the center of the first turn and second turn; and a first turn-second turn connector electrically connected between a second end of the first turn and a first end of the second turn comprising a spanning section between and coplanar with the first turn and the second turn and which spans the first turn gap and the second turn gap.

Abstract: An antenna arrangement for generating an electric field inside a process chamber is provided. Generally, the antenna arrangement comprises a first loop disposed around an antenna axis. The first loop comprises a first turn with a first turn gap; a second turn with a second turn gap, where the second turn is concentric and coplanar with the first turn and spaced apart from the first turn, and where the antenna axis passes through the center of the first turn and second turn; and a first turn-second turn connector electrically connected between a second end of the first turn and a first end of the second turn comprising a spanning section between and coplanar with the first turn and the second turn and which spans the first turn gap and the second turn gap.

Abstract: An antenna arrangement for generating an electric field inside a process chamber is provided. Generally, the antenna arrangement comprises a first loop disposed around an antenna axis. The first loop comprises a first turn with a first turn gap; a second turn with a second turn gap, where the second turn is concentric and coplanar with the first turn and spaced apart from the first turn, and where the antenna axis passes through the center of the first turn and second turn; and a first turn-second turn connector electrically connected between a second end of the first turn and a first end of the second turn comprising a spanning section between and coplanar with the first turn and the second turn and which spans the first turn gap and the second turn gap.

Abstract: A plasma processing chamber includes a substrate holder and a member of silicon carbide such as a liner, focus ring, perforated baffle or a gas distribution plate, the member having an exposed surface adjacent the substrate holder and the exposed surface being effective to minimize contamination during processing of substrates. The chamber can include an antenna which inductively couples RF energy through the gas distribution plate to energize process gas into a plasma state.

Abstract: Disclosed is a method and device for compensating a bias voltage on a wafer disposed over an electrostatic chuck in a processing chamber of a plasma processing system. The plasma processing system includes an electrostatic and RF power supplies that are coupled to the electrostatic chuck. The bias compensation device includes a voltage converter, a storage unit, and a voltage adjusting circuitry. The voltage converter is coupled to the electrostatic chuck for detecting a voltage Vpp of the electrostatic chuck. The voltage converter converts the detected voltage to a lower voltage Vref. The storage unit stores a predetermined slope and a predetermined offset of a calibration curve, which is derived by fitting a plurality of wafer bias voltages as a function of electrostatic chuck voltages.

Abstract: A plasma processing system for processing a substrate which includes a single chamber, substantially azimuthally symmetric plasma processing chamber within which a plasma is both ignited and sustained for the processing. The plasma processing chamber has no separate plasma generation chamber. The plasma processing chamber has an upper end and a lower end. The plasma processing system includes a coupling window disposed at an upper end of the plasma processing chamber and an RF antenna arrangement disposed above a plane defined by the substrate when the substrate is disposed within the plasma processing chamber for the processing. The plasma processing system also includes an electromagnet arrangement disposed above the plane defined by the substrate.

Abstract: A plasma processing system that includes a temperature management system and method that can achieve very accurate temperature control over a plasma processing apparatus is disclosed. In one embodiment, the temperature management system and method operate to achieve tight temperature control over surfaces of the plasma processing apparatus which interact with the plasma during fabrication of semiconductor devices. The tight temperature control offered by the invention can be implemented with combination heating and cooling blocks such that both heating and cooling can be provided from the same thermal interface.

Abstract: A plasma confinement arrangement for controlling the volume of a plasma while processing a substrate inside a process chamber using a plasma enhanced process is disclosed. The arrangement includes a first magnetic bucket having a plurality of first magnetic elements. The first magnetic elements being configured for producing a first magnetic field inside the process chamber. The arrangement further includes a second magnetic bucket having a plurality of second magnetic elements. The second magnetic elements being configured for producing a second magnetic field inside the process chamber. The second magnetic field being configured to combine with the first magnetic field to produce a resultant magnetic field between the first magnetic bucket and the second magnetic bucket. The resultant magnetic field being configured to permit by-product gas from the processing to pass through while substantially confining the plasma within a volume defined at least by the process chamber and the resultant magnetic field.

Abstract: A plasma processing apparatus for processing a substrate with a plasma is disclosed. The apparatus includes a first RF power source having a first RF frequency, and a process chamber. Further, the apparatus includes a substantially circular antenna operatively coupled to the first RF power source and disposed above a plane defined by the substrate when the substrate is disposed within the process chamber for processing. The substantially circular antenna being configured to induce an electric field inside the process chamber with a first RF energy generated by the first RF power source. The substantially circular antenna including at least a first pair of concentric loops in a first plane and a second pair of concentric loops in a second plane. The first pair of concentric loops and the second pair of concentric loops being substantially identical and symmetrically aligned with one another. The substantially circular antenna forming an azimuthally symmetric plasma inside the process chamber.

Abstract: In a plasma processing system for processing substrates such as semiconductor wafers, deposition of polymer in an area between a focus ring and an electrostatic chuck in a plasma processing chamber is achieved by providing a clearance gas in a gap between the chuck and the focus ring. A series of channels delivers the clearance gas to the annular gap between the outer surface of the substrate support and the inner surface of the focus ring surrounding the substrate support. The clearance gas supplied to the annular gap is preferably a gas such as helium which will not affect the wafer processing operation. In the case of plasma etching, the clearance gas is supplied at a flow rate which is sufficient to block the migration of process gas and volative byproducts thereof into the annular gap without adversely affecting edge etch performance.

Abstract: A plasma processing system that includes a temperature management system and method that can achieve very accurate temperature control over a plasma processing apparatus is disclosed. In one embodiment, the temperature management system and method operate to achieve tight temperature control over surfaces of the plasma processing apparatus which interact with the plasma during fabrication of semiconductor devices. The tight temperature control offered by the invention can be implemented with combination heating and cooling blocks such that both heating and cooling can be provided from the same thermal interface.

Abstract: A chamber liner for use in a semiconductor process chamber and a semiconductor process chamber containing the chamber liner are disclosed. The process chamber includes a housing having an inner surface defining a chamber in which a vacuum is drawn during processing of a semiconductor wafer. The chamber liner has a plasma confinement shield with a plurality of apertures. An outer sidewall extends upwardly from the plasma confinement shield. An outer flange extends outwardly from the outer sidewall such that the outer flange extends beyond the chamber and into a space at atmospheric pressure. The chamber liner preferably further includes an inner sidewall that extends upwardly from the plasma confinement shield. The plasma confinement shield, the inner and outer sidewalls, and the outer flange are preferably integral with one another.

Abstract: A chamber liner for use in a semiconductor process chamber and a semiconductor process chamber containing the chamber liner are disclosed. The process chamber includes a housing having an inner surface defining a chamber in which a vacuum is drawn during processing of a semiconductor wafer. The chamber liner has a plasma confinement shield with a plurality of apertures. An outer sidewall extends upwardly from the plasma confinement shield. An outer flange extends outwardly from the outer sidewall such that the outer flange extends beyond the chamber and into a space at atmospheric pressure. The chamber liner preferably further includes an inner sidewall that extends upwardly from the plasma confinement shield. The plasma confinement shield, the inner and outer sidewalls, and the outer flange are preferably integral with one another.

Abstract: A window of a plasma processing chamber. The window includes a first dielectric portion having a first electrical thickness and a first resistivity to an etching plasma that is formed within the plasma processing chamber. There is further included a second dielectric portion disposed within the first dielectric portion. The second dielectric portion has a second electrical thickness that is less than the first electrical thickness. The second dielectric portion is formed of a substantially transparent material and has a second resistivity to the etching plasma. The second resistivity is higher than the first resistivity.