Abstract: A method is provided for organizing a communications frame structure with selectable synchronization words. The frame structure includes a header section for overhead bits. The number of bits, position of those bits, and the content of the bits used for synchronization of the frame structure are selected from the header section for use in transmitting information. On the receiving end of the transmission, the same number, position, and content of bits are selected to synchronize the received information stream. A communications repeater and system using the above-described selectable frame synchronization structure method is also provided.

Abstract: A method for analyzing Gigabit Ethernet (GBE) and fiber channel protocol communications is provided which provides a more detailed understanding of the errors, than that provided under the IEEE 802.3z standard. The method creates an additional parity error signal which is not specified under the IEEE 802.3z standard. The parity error signals and IEEE 802.3z invalid code word signals are used to provide an analysis of whether the underlying communication errors are a result of 8B/10B coding word errors or running disparity errors. A system and apparatus to monitor performance in accordance with the above-mentioned method is also provided.

Abstract: A method is provided for creating an auxiliary link embedded in the overhead structure of a primary data link. The primary data link is organized in a frame structure which includes data sections and header sections. Information in the header sections is used to synchronize and capture transmitted messages. However, not all the overhead bits need be used for synchronization. Bits may be selectively “robbed” from the header section and used to transfer information in an auxiliary data link. The number of bits that are used to support the auxiliary data link, as well as the placement of these bits in the header section are both selectable. An apparatus, specifically the AMCC 3062 Performance Monitor IC, has also been described which supports the establishment of an auxiliary data link in accordance with the above-mentioned method.

Abstract: A method is provided for selectively inserting data, from a plurality of data sources, into a transmitted stream of information. The method makes a first selection to store data from at least a first and second source in a TX_OH memory. Then, the method makes a second selection, inserting the data stored in the TX_OH memory, into a transmitted stream of information. Typically, the information stream is a SONET/SDH protocol communication in a frame structure which includes overhead bytes. The provided method permits the overhead bytes of a received SONET/SDH communication to be selectively replaced with overhead bytes from either an FPGA or microprocessor source. An apparatus and system for arbitrating between multiple data sources in a communication transmission is also provided.

Abstract: A method for monitoring the performance of digital communications has been provided which selectively performs Forward Error Corrections (FEC)s on the monitored data. In addition to selectively performing FEC, the process selectively decodes input data, and selectively encodes data for transmission. The decoding, FEC, and encoding operations can also be combined. Further, the process selectively performs evaluations of SONET/SDH protocol communications, Gigabit Ethernet (GBE), and other fiber channel communications, in addition to the selective decode/FEC/encode processes. An apparatus and system to enable the above-mentioned selective monitoring process has also been provided.

Abstract: The invention is directed to a technique for recalculating a bit interleave parity (BIP) byte for byte interleaved SONET/SDH frames. An interleaved SONET/SDH frame consists of a plurality (N) of base STS-1 frames that are byte interleave multiplexed. Each STS-1 frame contains transport overhead bytes, including a BIP byte (B2) and a remote error indication byte (M1). The M1 byte is associated with error over an entire interleaved STS-N frame and not a particular individual STS-1 frame. Each B2 byte is associated with a particular STS-1 frame and is calculated over selected overhead bytes, including the M1 byte, and all of the payload bytes of the previous STS-1 frame. When SONET frames are multiplexed, the M1 byte values are changed and the B2 parity calculations for each STS-1 frame must be updated. Existing systems generally update the affected B2 bytes by performing the B2 parity calculation over all of the respective overhead bytes and payload bytes for each frame.

Abstract: The invention provides an apparatus, and related method, for providing a reconfigurable frame counter that can accommodate differing start of frame pulse locations in a synchronous communication system. The frame counter may be integrated with existing devices thus providing a cost effective advance in the functionality of existing communication devices. The reconfigurable frame counter includes a multiplexer, a byte processor and a frame counter. The multiplexer byte interleave multiplexes a plurality of lower data rate SONET signals to generate a higher data rate SONET signal of framed data bytes. The byte processor processes transport overhead bytes of the higher data rate SONET signal in accordance with a frame byte count value. The frame byte counter counts clock pulses that are each associated with the arrival of a framed data byte and generates a frame byte count value that corresponds to a frame byte location of the currently received framed data byte.