Abstract: An APL field switch includes a number of ports that transmit power to APL field devices connected to spurs extending from the ports. The APL Power Class of each port can be dynamically set by a user to enable more efficient allocation of power to the ports to meet the needs of the connected field devices.

Abstract: A field device I/O connector includes a base and an I/O module removably mounted on the base for transmitting I/O signals along an I/O channel. A set of electrical connectors mounted on the base connect the base to a field device. The electrical connectors, the base, and the I/O module mounted on the base cooperate to define the I/O channel. The I/O channel includes a conversion circuit to convert between I/O signals and a digital data format output from the field device I/O connector. The base and I/O module also cooperate to define a diagnostic circuit connected to the portion of the I/O channel extending through the I/O module. The diagnostic circuit extends to a diagnostic logic circuit that may be included on the base, in the I/O module, or away from the field device I/O connector.

Abstract: A field device I/O connector includes a base and an I/O module removably mounted on the base for transmitting I/O signals along an I/O channel. A set of electrical connectors mounted on the base connect the base to a field device. The electrical connectors, the base, and the I/O module mounted on the base cooperate to define the I/O channel. The I/O channel includes a conversion circuit to convert between I/O signals and a digital data format output from the field device I/O connector. The base and I/O module also cooperate to define a diagnostic circuit connected to the portion of the I/O channel extending through the I/O module. The diagnostic circuit extends to a diagnostic logic circuit that may be included on the base, in the I/O module, or away from the field device I/O connector.

Abstract: The present invention is transparent, high-impact window panels fused within sidewalls of a football helmet. The transparent portion on each sidewall maintains as one piece with the helmet. The transparent sidewalls increase lateral vision for the wearer, thus enhancing performance and safety for the wearer as well.

Abstract: A tumble chiller has a rotary drum with a perforated side wall. The drum is enclosed by a cooling jacket through which coolant such as ethylene glycol may be passed. Cooling liquid such as water or brine fills the drum. The drum has scoop-like projections which cause the cooling liquid to flow across the cooling jacket as the drum rotates. The cooling liquid may follow a path around the inner side of the jacket and then follow a path around its outer side. The drum is drivable in rotation by sprocket meshing with a roller chain fast with a flange at the rear end of the drum.

Abstract: A DDR DRAM having a test mode and an operational mode and a method for testing the DDR DRAM. The method includes in the order recited: (a) placing the DDR DRAM in test mode; (b) issuing a bank activate command to select and bring up a wordline selected for write of the DDR DRAM; (c) writing with auto-precharge, a test pattern to cells of the DDR DRAM; (d) repeating steps (b) and (c) until all wordlines for write have been selected; (e) issuing a bank activate command to select and bring up a wordline selected for read of the DDR DRAM; (f) reading with auto-precharge, the stored test pattern from cells of the DDR DRAM; and (g) repeating steps (e) and (f) until all wordlines for read have been selected.

Abstract: A SDRAM. The SDRAM including: at least one bank of DRAM cells; the SDRAM operable to a first specification defined by a first clock frequency, a first write recovery time and a first time interval for precharge to row address strobe; and means for programming the SDRAM operable to a second specification defined by a second clock frequency, a second write recovery time and a second time interval for precharge to row address strobe.

Abstract: Disclosed is a flexible command multiplication scheme for the built-in-self test (BIST) of a high-speed embedded memory array that segments BIST functionality into remote lower-speed executable instructions and local higher-speed executable instructions. A stand-alone BIST logic controller operates at a lower frequency and communicates with a command multiplier using a low-speed BIST instruction seed set. The command multiplier uses offset or directive registers to drive a logic unit or ALU to generate “n” sets of CAD information which are then time-multiplexed to the embedded memory at a speed “n” times faster than the BIST operating speed.

Abstract: A method for testing a DDR DRAM having a test mode and an operational mode is described. The method including in the order recited: (a) placing the DDR DRAM in test mode; (b) issuing a bank activate command to select and bring up a wordline selected for write of the DDR DRAM; (c) writing with auto-precharge, a test pattern to cells of the DDR DRAM; (d) repeating steps (b) and (c) until all wordlines for write have been selected; (e) issuing a bank activate command to select and bring up a wordline selected for read of the DDR DRAM; (f) reading with auto-precharge, the stored test pattern from cells of the DDR DRAM; and (g) repeating steps (e) and (f) until all wordlines for read have been selected.

Abstract: Compositions comprising certain macrolides are disclosed which are useful in methods for the treatment of reversible obstructive airway diseases, particularly asthma.