Abstract: A method of forming a vertical transistor comprising a top source/drain region, a bottom source/drain region, a channel region vertically between the top and bottom source/drain regions, and a gate operatively laterally-adjacent the channel region comprises, in multiple time-spaced microwave annealing steps, microwave annealing at least the channel region. The multiple time-spaced microwave annealing steps reduce average concentration of elemental-form H in the channel region from what it was before start of the multiple time-spaced microwave annealing steps. The reduced average concentration of elemental-form H is 0.005 to less than 1 atomic percent. Structure embodiments are disclosed.

Abstract: One embodiment of the invention includes a processing subsystem (30) responsive to the detection of sound coming from a room (26) to establish an acoustic impulse response for the room (26), and determine a number of sound reflections corresponding to the impulse response. This subsystem (30) is further operable to determine volume of the room (26), one or more dimensions of the room (26) and/or at least one absorption coefficient of a room boundary as a function of the sound reflections.

Abstract: System (10) is disclosed including an acoustic sensor array (20) coupled to processor (42). System (10) processes inputs from array (20) to extract a desired acoustic signal through the suppression of interfering signals. The extraction/suppression is performed by modifying the array (20) inputs in the frequency domain with weights selected to minimize variance of the resulting output signal while maintaining unity gain of signals received in the direction of the desired acoustic signal. System (10) may be utilized in hearing, cochlear implants, speech recognition, voice input devices, surveillance devices, hands-free telephony devices, remote telepresence or teleconferencing, wireless acoustic sensor arrays, and other applications.

Abstract: System (10) is disclosed including an acoustic sensor array (20) coupled to processor (42). System (10) processes inputs from array (20) to extract a desired acoustic signal through the suppression of interfering signals. The extraction/suppression is performed by modifying the array (20) inputs in the frequency domain with weights selected to minimize variance of the resulting output signal while maintaining unity gain of signals received in the direction of the desired acoustic signal. System (10) may be utilized in hearing aids, voice input devices, surveillance devices, and other applications.

Abstract: One embodiment of the invention includes a processing subsystem (30) responsive to the detection of sound coming from a room (26) to establish an acoustic impulse response for the room (26), and determine a number of sound reflections corresponding to the impulse response. This subsystem (30) is further operable to determine volume of the room (26), one or more dimensions of the room (26) and/or at least one absorption coefficient of a room boundary as a function of the sound reflections.

Abstract: System (10) is disclosed including an acoustic sensor array (20) coupled to processor (42). System (10) processes inputs from array (20) to extract a desired acoustic signal through the suppression of interfering signals. The extraction/suppression is performed by modifying the array (20) inputs in the frequency domain with weights selected to minimize variance of the resulting output signal while maintaining unity gain of signals received in the direction of the desired acoustic signal. System (10) may be utilized in hearing, cochlear implants, speech recognition, voice input devices, surveillance devices, hands-free telephony devices, remote telepresence or teleconferencing, wireless acoustic sensor arrays, and other applications.

Abstract: A method for growing an epitaxial silicon-germanium layer is described. The method includes removing a native oxide layer on the silicon substrate surface. A HF vapor treatment process is then conducted on the silicon substrate. Thereafter, a germanium layer is formed on the silicon substrate, followed by performing a rapid thermal anneal process under an inert gas to form a silicon-germanium alloy layer on the surface of the silicon substrate.