Patents by Inventor ALBERT H. CHEN

ALBERT H. CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10887393
    Abstract: A Data Storage Device (DSD) includes a Non-Volatile Memory (NVM) for storing data and a first processor configured to execute a firmware for retrieving data from the NVM and storing data in the NVM. A second processor of the DSD executes an application Operating System (OS) to interface with the first processor. The second processor sends a command to the first processor using the application OS to retrieve data from the NVM or store data in the NVM.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: January 5, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: James N. Malina, Benixon Arul Dhas, Albert H. Chen
  • Patent number: 10761777
    Abstract: A Data Storage Device (DSD) includes a first memory for storing data and a Storage Class Memory (SCM) for storing data. The SCM has at least one characteristic of being faster than the first memory in storing data, using less power to store data than the first memory, and providing a greater usable life than the first memory for repeatedly storing data in a same memory location. At least a portion of the SCM is allocated or reserved for use by a host, and logical addresses assigned to the SCM are mapped to device addresses of the first memory identifying locations for storing data in the first memory. The host is provided with an indication of the logical addresses assigned to the SCM to allow the host to retrieve data from and store data in the DSD or to directly access data using the logical addresses assigned to the SCM.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: September 1, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: James N. Malina, Albert H. Chen, Takeaki Kato
  • Publication number: 20200162553
    Abstract: A Data Storage Device (DSD) includes a Non-Volatile Memory (NVM) for storing data and a first processor configured to execute a firmware for retrieving data from the NVM and storing data in the NVM. A second processor of the DSD executes an application Operating System (OS) to interface with the first processor. The second processor sends a command to the first processor using the application OS to retrieve data from the NVM or store data in the NVM.
    Type: Application
    Filed: January 24, 2020
    Publication date: May 21, 2020
    Inventors: James N. Malina, Benixon Arul Dhas, Albert H. Chen
  • Patent number: 10587689
    Abstract: A Data Storage Device (DSD) includes a Non-Volatile Memory (NVM) for storing data and a first processor configured to execute a firmware for retrieving data from the NVM and storing data in the NVM. A second processor of the DSD executes an application Operating System (OS) to interface with the first processor. The second processor sends a command to the first processor using the application OS to retrieve data from the NVM or store data in the NVM.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: March 10, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: James N. Malina, Benixon Arul Dhas, Albert H. Chen
  • Patent number: 10374634
    Abstract: An individual latency indicator is determined for each Data Storage Device (DSD) or memory portion of a DSD storing one or more erasure coded shards generated from an erasure coding on initial data. Each individual latency indicator is associated with a latency in retrieving an erasure coded shard stored in a respective DSD or memory portion. At least one collective latency indicator is determined using determined individual latency indicators, with the at least one collective latency indicator being associated with a latency in retrieving multiple erasure coded shards. The at least one collective latency indicator is compared to a latency limit, and a subset of erasure coded shards is selected to retrieve based on the comparison of the at least one collective latency indicator to the latency limit.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: August 6, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: James N. Malina, Robert L. Horn, Kent Anderson, James C. Alexander, Albert H. Chen
  • Patent number: 10372344
    Abstract: A collective latency indicator is determined that is associated with a latency in retrieving multiple erasure coded shards generated from an erasure coding on initial data. The collective latency indicator is compared to a latency limit, and a number of erasure coded shards to retrieve is adjusted based on the comparison of the collective latency indicator to the latency limit.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: August 6, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: James N. Malina, Robert L. Horn, Kent Anderson, James C. Alexander, Albert H. Chen
  • Patent number: 10282130
    Abstract: At least one attribute defined by a host is used to identify data and/or a location for a destination portion for relocating data from a source portion to the destination portion. The data is relocated from the source portion to the destination portion in accordance with the identification of the data to be relocated and/or the location for the destination portion, and it is determined if a change was made to relevant data stored in the source portion while relocating the data from the source portion to the destination portion. If a change was made to relevant data stored in the source portion while relocating the data to the destination portion, the changed relevant data is relocated from the source portion to the destination portion.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: May 7, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Albert H. Chen, James N. Malina
  • Patent number: 10248362
    Abstract: Managing data stored in at least one Data Storage Device (DSD) includes generating a Linear Tape File System (LTFS) write or read command including an LTFS block address. The generated LTFS command is for writing or reading data in an LTFS data partition, writing or reading metadata in the LTFS data partition, or writing or reading metadata in an LTFS index partition. The LTFS block address is translated to a device address for the at least one DSD using state metadata representing a state of the LTFS data partition and/or a state of the LTFS index partition. The data or the metadata is written or read in the at least one DSD at the device address.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: April 2, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: James N. Malina, Albert H. Chen
  • Publication number: 20190065121
    Abstract: A Data Storage Device (DSD) includes a first memory for storing data and a Storage Class Memory (SCM) for storing data. The SCM has at least one characteristic of being faster than the first memory in storing data, using less power to store data than the first memory, and providing a greater usable life than the first memory for repeatedly storing data in a same memory location. At least a portion of the SCM is allocated or reserved for use by a host, and logical addresses assigned to the SCM are mapped to device addresses of the first memory identifying locations for storing data in the first memory. The host is provided with an indication of the logical addresses assigned to the SCM to allow the host to retrieve data from and store data in the DSD or to directly access data using the logical addresses assigned to the SCM.
    Type: Application
    Filed: October 31, 2018
    Publication date: February 28, 2019
    Inventors: James N. Malina, Albert H. Chen, Takeaki Kato
  • Patent number: 10126981
    Abstract: A write command is received to store data in a Data Storage Device (DSD). At least one of a Non-Volatile Random Access Memory (NVRAM) and a Storage Class Memory (SCM) is selected for storing the data of the write command based on a number of previously received write commands indicating an address of the write command or a priority of the write command. The SCM has at least one characteristic of being faster than the NVRAM in storing data, using less power to store data, and providing a greater usable life for repeatedly storing data in a same memory location. In one example, at least a portion of the SCM is allocated for use by a host. Logical addresses assigned to the SCM are mapped to device addresses of the NVRAM. The host is provided with an indication of the logical addresses assigned to the SCM.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: November 13, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: James N. Malina, Albert H. Chen, Takeaki Kato
  • Publication number: 20180165016
    Abstract: A collective latency indicator is determined that is associated with a latency in retrieving multiple erasure coded shards generated from an erasure coding on initial data. The collective latency indicator is compared to a latency limit, and a number of erasure coded shards to retrieve is adjusted based on the comparison of the collective latency indicator to the latency limit.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 14, 2018
    Inventors: James N. MALINA, Robert L. HORN, Kent ANDERSON, James C. ALEXANDER, Albert H. CHEN
  • Publication number: 20180165015
    Abstract: An individual latency indicator is determined for each Data Storage Device (DSD) or memory portion of a DSD storing one or more erasure coded shards generated from an erasure coding on initial data. Each individual latency indicator is associated with a latency in retrieving an erasure coded shard stored in a respective DSD or memory portion. At least one collective latency indicator is determined using determined individual latency indicators, with the at least one collective latency indicator being associated with a latency in retrieving multiple erasure coded shards. The at least one collective latency indicator is compared to a latency limit, and a subset of erasure coded shards is selected to retrieve based on the comparison of the at least one collective latency indicator to the latency limit.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 14, 2018
    Inventors: James N. MALINA, Robert L. HORN, Kent ANDERSON, James C. ALEXANDER, Albert H. CHEN
  • Patent number: 9864529
    Abstract: During a startup process of a host, a request is sent to a DSD to identify storage media of the DSD. Identification information is received from the DSD before executing a driver on the host for interfacing with the DSD. The identification information identifies a first storage media of the DSD in response to the request. A second storage media is later identified using the driver.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: January 9, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Albert H. Chen, James N. Malina
  • Publication number: 20170315756
    Abstract: Managing data stored in at least one Data Storage Device (DSD) includes generating a Linear Tape File System (LTFS) write or read command including an LTFS block address. The generated LTFS command is for writing or reading data in an LTFS data partition, writing or reading metadata in the LTFS data partition, or writing or reading metadata in an LTFS index partition. The LTFS block address is translated to a device address for the at least one DSD using state metadata representing a state of the LTFS data partition and/or a state of the LTFS index partition. The data or the metadata is written or read in the at least one DSD at the device address.
    Type: Application
    Filed: July 17, 2017
    Publication date: November 2, 2017
    Inventors: James N. Malina, Albert H. Chen
  • Patent number: 9720627
    Abstract: Managing data stored in at least one data storage device (DSD) of a computer system where the at least one DSD includes at least one disk for storing data. A Linear Tape File System (LTFS) write or read command is generated including an LTFS block address. The LTFS block address is translated to a device address for the at least one DSD and data on a disk of the at least one DSD is written or read at the device address.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: August 1, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Albert H. Chen, James N. Malina
  • Patent number: 9639287
    Abstract: In operating a Data Storage Device (DSD) in communication with a host, a reported write command log is maintained that includes entries identifying pending write commands reported as completed to the host but whose data is not yet stored in at least one Non-Volatile Memory (NVM) of the DSD. The reported write command log is maintained to persist over power cycles. A write command is received from the host to store data in the at least one NVM and the data for the write command is buffered in a volatile memory of the DSD for storage in the at least one NVM. The reported write command log is updated to account for the write command as a pending write command reported as completed, and an indication is sent to the host reporting completion of the write command before completing storage of the data in the at least one NVM.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: May 2, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: James N. Malina, Albert H. Chen
  • Patent number: 9621653
    Abstract: A Data Storage Device (DSD) includes a Non-Volatile Memory (NVM) for storing data, a network interface for communicating on a network, and a processor. According to one aspect, a command is received via the network interface for storing data in the NVM or retrieving data from the NVM. Based on a transport attribute of the command, it is determined whether to execute a file interface for accessing files stored in the NVM or an object interface for accessing data objects stored in the NVM. According to another aspect, computer-executable instructions are received from a device via the network interface and the computer-executable instructions are executed using an off-load interface. The computer-executable instructions cause the processor to transform data stored in the NVM or data received from the network and send the transformed data to another device on the network or store the transformed data in the NVM.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: April 11, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Albert H. Chen, James N. Malina, Benixon Arul Dhas
  • Publication number: 20170068485
    Abstract: At least one attribute defined by a host is used to identify data and/or a location for a destination portion for relocating data from a source portion to the destination portion. The data is relocated from the source portion to the destination portion in accordance with the identification of the data to be relocated and/or the location for the destination portion, and it is determined if a change was made to relevant data stored in the source portion while relocating the data from the source portion to the destination portion. If a change was made to relevant data stored in the source portion while relocating the data to the destination portion, the changed relevant data is relocated from the source portion to the destination portion.
    Type: Application
    Filed: November 3, 2016
    Publication date: March 9, 2017
    Inventors: Albert H. CHEN, James N. MALINA
  • Patent number: 9501393
    Abstract: Managing data in a data storage system including at least one Data Storage Device (DSD) and a host. An initial location is determined for data to be stored in the at least one DSD based on at least one attribute defined by the host. A source portion is identified from a plurality of source portions in the at least one DSD for a garbage collection operation based on the at least one attribute defined by the host. A destination portion is identified in the at least one DSD for storing data resulting from the garbage collection operation based on the at least one attribute defined by the host. Garbage collection of the data in the source portion is performed into the destination portion, and after completion of garbage collection, the source portion is designated as a new destination portion for a new garbage collection operation.
    Type: Grant
    Filed: November 11, 2014
    Date of Patent: November 22, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: Albert H. Chen, James N. Malina
  • Publication number: 20150237138
    Abstract: A Data Storage Device (DSD) includes a Non-Volatile Memory (NVM) for storing data and a first processor configured to execute a firmware for retrieving data from the NVM and storing data in the NVM. A second processor of the DSD executes an application Operating System (OS) to interface with the first processor. The second processor sends a command to the first processor using the application OS to retrieve data from the NVM or store data in the NVM.
    Type: Application
    Filed: February 12, 2015
    Publication date: August 20, 2015
    Inventors: JAMES N. MALINA, BENIXON ARUL DHAS, ALBERT H. CHEN