Patents by Inventor Albert KUMAR

Albert KUMAR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240168947
    Abstract: Multiple execution environments are established for processing database statements with diverse package dependencies. A database system receives a user application and identifies, via hardware processors, multiple package dependencies required by the application, including at least a first and a second package dependency. Upon receiving a database statement from a user that invokes these dependencies, the system retrieves the necessary packages from a repository. It then creates a first execution environment incorporating the first package dependency and a second execution environment with the second package dependency. Utilizing the multiple execution environments, the system generates results data in response to the database statement, effectively managing and executing user-defined functions that rely on different versions or types of package dependencies within a unified database framework.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 23, 2024
    Inventors: Srilakshmi Chintala, Chong Han, Albert L. Hu, Nitya Kumar Sharma, Igor Zinkovsky
  • Patent number: 11928110
    Abstract: A database dependency resolver system can identify different dependencies of a user application and integrate the identified dependencies in different execution environments of a distributed database system. The different execution environments can manage different versions of a given programming language, or other types of computational architectures (e.g., different CPU types). A database user can provide a database statement (e.g., query) that activates the different dependencies in the different environments to generate results data.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: March 12, 2024
    Assignee: Snowflake Inc.
    Inventors: Srilakshmi Chintala, Chong Han, Albert L. Hu, Nitya Kumar Sharma, Igor Zinkovsky
  • Patent number: 11930723
    Abstract: An ionic redox transistor comprises a solid channel, a solid reservoir layer, and a solid electrolyte layer disposed between the channel and the reservoir layer. The channel exhibits a substantially linear current-voltage relationship in a first range of voltages, and a nonlinear current-voltage relationship in a second range of voltages that is greater than the first range of voltages. One or both of the substantially linear current-voltage relationship or the nonlinear current-voltage relationship of the channel is varied by changing the concentration of ions such as oxygen vacancies in the channel. Ion or vacancy transport between the channel and the reservoir layer across the electrolyte layer occurs in response to applying a voltage between the channel and the reservoir layer. Subject to the first range of voltages, the channel can function as a synapse device. Subject to the second range of voltages, the channel can function as a neuron device.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: March 12, 2024
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Albert Alec Talin, Elliot James Fuller, Christopher Bennett, Tianyao Xiao, Matthew Marinella, Suhas Kumar
  • Publication number: 20240074201
    Abstract: A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating different-composition first tiers and second tiers. The stack comprises lower channel-material strings extending through the first tiers and the second tiers. Conductive masses are formed that comprise at least one of conductively-doped semiconductive material or conductive metal material. Individual of the conductive masses are atop and directly electrically coupled to individual of the lower channel-material strings. Upper channel-material strings of select-gate transistors are formed directly above the stack. Individual of the upper channel-material strings are directly above and directly electrically coupled to individual of the conductive masses. Other embodiments, including structure, are disclosed.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 29, 2024
    Applicant: Micron Technology, Inc.
    Inventors: Matthew J. King, Albert Fayrushin, Sidhartha Gupta, Jun Fujiki, Masashi Yoshida, Yiping Wang, Taehyun Kim, Arun Kumar Dhayalan
  • Publication number: 20230401378
    Abstract: A system for automated preparation and submission of electronic registration may obtain a pre-existing entity identifier that had been previously used by an electronic system of at least one authority entity to identify a primary entity. The system may electronically associate the pre-existing entity identifier with the primary entity and use it to perform automated actions to electronically collect one or more support content from the Internet or other sources regarding the primary entity. The system may electronically identify data from the support content relevant to the electronic registration and electronically extract the identified data from the support content. The system may also electronically verify the extracted data before electronically generating and submitting the electronic registration based on the extracted data. An adaptive UI may be automatically modified in response to a determination whether to electronically present a query via the adaptive UI for the supplemental data.
    Type: Application
    Filed: June 7, 2023
    Publication date: December 14, 2023
    Inventors: Albert Kumar Boulus, Masa Karahashi, Emmanuel Thangaraj, Anup David Parekh, Will Colborn, Scott Seely, Matt Johnson, Anh Carter, Patricia Oakley, Matt Buckley, Graham Edwards
  • Publication number: 20230401108
    Abstract: Systems and methods are disclosed for automated preparation and transmission of electronic registrations, data sheets and resources. This may include electronically initiating a process to collect data via a graphical user interface (GUI) to facilitate automated preparation of an electronic registration, including electronically obtaining a pre-existing entity identifier. The system may use the entity identifier to perform automated actions to electronically collect one or more support content. The system may generate the electronic registration based on the one or more support content and also receives interchange data. The system then automatically generates an electronic data sheet based on the registration and interchange data. The system may then electronically file the generated electronic data sheet, electronically issuing an alert to electronically request additional resources and automatically transmitting the finalized amount of resources to the domain.
    Type: Application
    Filed: June 7, 2023
    Publication date: December 14, 2023
    Inventors: John Tindell, Tobin Mathew, Will Colborn, Albert Kumar Boulus, Anup David Parekh, Masa Karahashi, Emmanuel Thangaraj, Narasimha Paila, Alex Huang, Anh Carter, Swapnil Singh, Patricia Oakley, Matt Buckley, Graham Edwards, Scott Seely, Matt Johnson
  • Publication number: 20230401175
    Abstract: A disclosed method may include receiving user information for electronically filing or updating an electronic data sheet that corresponds to a user and a domain; maintaining a record of past electronic activities by the user; electronically receiving interchange data associated with interchanges executed by the user; automatically generating the electronic data sheet for the user based on the user information and the interchange data, the electronic data sheet indicating a finalized amount of resources to be transmitted to the domain; and electronically adjusting an electronic value for the user according to a remittance risk determination that is based on the interchange data and the record of past electronic activities by the user, the adjusted electronic value indicating a maximum amount of resources for which an online software platform will transmit and receive protocols to enable providing by the online software platform the maximum amount of resources.
    Type: Application
    Filed: June 7, 2023
    Publication date: December 14, 2023
    Inventors: John Tindell, Tobin Mathew, Will Colborn, Albert Kumar Boulus, Anup David Parekh, Masa Karahashi, Emmanuel Thangaraj, Narasimha Paila, Alex Huang, Anh Carter, Swapnil Singh, Patricia Oakley, Matt Buckley, Graham Edwards
  • Publication number: 20230401635
    Abstract: A disclosed method may include receiving user information for electronically filing or updating an electronic data sheet that corresponds to a user and a domain; maintaining a record of past electronic activities by the user; electronically receiving interchange data associated with interchanges executed by the user; automatically generating the electronic data sheet for the user based on the user information and the interchange data, the electronic data sheet indicating a finalized amount of resources to be transmitted to the domain; and electronically adjusting an electronic value for the user according to a remittance risk determination that is based on the interchange data and the record of past electronic activities by the user, the adjusted electronic value indicating a maximum amount of resources for which an online software platform will transmit and receive protocols to enable providing by the online software platform the maximum amount of resources.
    Type: Application
    Filed: June 7, 2023
    Publication date: December 14, 2023
    Inventors: Albert Kumar Boulus, Anup David Parekh, Scott Seely
  • Patent number: 11610916
    Abstract: A semiconductor structure for RF applications comprises: a first ?TP GaN transistor on an SOI wafer or die; and a first resistor connected to the gate of said first transistor.
    Type: Grant
    Filed: May 5, 2020
    Date of Patent: March 21, 2023
    Assignee: X-FAB France SAS
    Inventors: Imène Lahbib, Jérôme Loraine, Frédéric Drillet, Albert Kumar, Gregory U'ren
  • Publication number: 20220415927
    Abstract: A semiconductor structure for RF applications comprises: a first ?TP GaN transistor on an SOI wafer or die; and a first resistor connected to the gate of said first transistor.
    Type: Application
    Filed: August 24, 2022
    Publication date: December 29, 2022
    Inventors: Imène Lahbib, Jérôme Loraine, Frédéric Drillet, Albert Kumar, Gregory U'ren
  • Publication number: 20200365619
    Abstract: A semiconductor structure for RF applications comprises: a first ?TP GaN transistor on an SOI wafer or die; and a first resistor connected to the gate of said first transistor.
    Type: Application
    Filed: May 5, 2020
    Publication date: November 19, 2020
    Inventors: Imène Lahbib, Jérôme Loraine, Frédéric Drillet, Albert Kumar, Gregory U'ren
  • Patent number: 10505541
    Abstract: A level shifter according to some embodiments is disclosed. In some embodiments, a level shifter includes a middle-of-the-line (MOL) capacitor; and a circuit including at least one thin-film transistor coupled to the MOL capacitor, wherein an input voltage provided to the MOL capacitor is split between the MOL capacitor and the circuit. The MOL capacitor can be formed with a contact strip adjacent to a gate structure. A method of forming a level shifter using thin-oxide technologies includes forming a middle-of-the-line (MOL) capacitor; forming a circuit with one or more thin-film transistors; and coupling the MOL capacitor to the circuit such that an input voltage provided at the MOL capacitor is split between the MOL capacitor and the circuit.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: December 10, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Albert Kumar, Ramaprasath Vilangudipitchai, Vasisht Vadi, Paul Penzes
  • Publication number: 20190107569
    Abstract: Aspects of the disclosure includes a transistor-under-test (TUT) to charge/discharge a capacitor; changing an oscillation state when a capacitor voltage crosses a threshold and turning OFF the TUT; discharging the capacitor using the TUT; commencing precharging the capacitor after detecting the capacitor reaches a transition voltage; commencing discharging the capacitor after a precharger time delay; sustaining a relaxation oscillator waveform, wherein the relaxation oscillator waveform is based on turning OFF/ON the TUT; and generating a digital representation of a TUT current associated with a relaxation oscillator period of the relaxation oscillator waveform.
    Type: Application
    Filed: October 11, 2017
    Publication date: April 11, 2019
    Inventors: David Kidd, Ardavan Moassessi, Angelo Pinto, Albert Kumar, Yi Lou, Bipin Duggal, Amar Gulhane, Michael Bourland, Mustafa Badaroglu, Paul Penzes
  • Publication number: 20190058477
    Abstract: A level shifter according to some embodiments is disclosed. In some embodiments, a level shifter includes a middle-of-the-line (MOL) capacitor; and a circuit including at least one thin-film transistor coupled to the MOL capacitor, wherein an input voltage provided to the MOL capacitor is split between the MOL capacitor and the circuit. The MOL capacitor can be formed with a contact strip adjacent to a gate structure. A method of forming a level shifter using thin-oxide technologies includes forming a middle-of-the-line (MOL) capacitor; forming a circuit with one or more thin-film transistors; and coupling the MOL capacitor to the circuit such that an input voltage provided at the MOL capacitor is split between the MOL capacitor and the circuit.
    Type: Application
    Filed: August 18, 2017
    Publication date: February 21, 2019
    Inventors: Albert KUMAR, Ramaprasath VILANGUDIPITCHAI, Vasisht VADI, Paul PENZES
  • Patent number: 10032763
    Abstract: In an aspect of the disclosure, a MOS device for using bulk cross-coupled thin-oxide decoupling capacitor is provided. The MOS device may include a pMOS transistor and an nMOS transistor. The MOS device may include a first set of transistor body connections adjacent the pMOS transistor and the nMOS transistor. The first set of transistor body connections may couple a first voltage source to the pMOS transistor body. The first set of transistor body connections may further couple a second voltage source to the nMOS transistor body. The MOS device may include a second set of transistor body connections adjacent the pMOS transistor and the nMOS transistor. The second set of transistor body connections may couple the nMOS transistor gate to the pMOS transistor body. The second set of transistor body connections may further couple the pMOS transistor gate to the nMOS transistor body.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: July 24, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Albert Kumar, Hai Dang, Sreeker Dundigal, Vasisht Vadi
  • Publication number: 20170352651
    Abstract: In an aspect of the disclosure, a MOS device for using bulk cross-coupled thin-oxide decoupling capacitor is provided. The MOS device may include a pMOS transistor and an nMOS transistor. The MOS device may include a first set of transistor body connections adjacent the pMOS transistor and the nMOS transistor. The first set of transistor body connections may couple a first voltage source to the pMOS transistor body. The first set of transistor body connections may further couple a second voltage source to the nMOS transistor body. The MOS device may include a second set of transistor body connections adjacent the pMOS transistor and the nMOS transistor. The second set of transistor body connections may couple the nMOS transistor gate to the pMOS transistor body. The second set of transistor body connections may further couple the pMOS transistor gate to the nMOS transistor body.
    Type: Application
    Filed: June 2, 2016
    Publication date: December 7, 2017
    Inventors: Albert KUMAR, Hai DANG, Sreeker DUNDIGAL, Vasisht VADI