Abstract: A radar encoder comprising a delta modulation circuit which receives analog adar video data from a radar and then converts the data to digitized NRZL video data. The radar encoder also has an encoder circuit which receives the digitized NRZL video data as well as a trigger pulse signal and analog synchro signals from the radar. The synchro signals are provided to a Synchro-to-Digital Converter which converts the synchro signals to sixteen digital synchro data bits which are then latched into the converter. The synchro data bits are next parallel transferred to a pair of shift registers and then clocked in a serial format to a multiplexer. The multiplexer also receives the digitized NRZL video data supplied to the encoder circuit. A state machine, in response to the trigger pulse signal, generates control signals to latch the synchro data bits into the converter and then effect the parallel transfer of the synchro data bits from the converter to the shift registers.

Abstract: A radar decoder circuit for converting NRZL Data to radar video data which s supplied to a radar video display screen. The radar video circuit includes an Erasable Programmable Logic Device which decodes incoming NRZL data to identify a frame sync having twenty four data bits. When the frame sync is identified the location of sixteen bits of synchro data is also determined. The synchro data is then latched into a latch within the Erasable Programmable Logic Device for processing by a Digital-to-Synchro Converter. Control signals for effecting a transfer of the synchro data to the Digital-to-Synchro Converter are provided by enable and latch signal generating circuit within the Erasable Programmable Logic Device. The Digital-to-Synchro Converter converts the digital synchro data to analog synchro signals which are supplied to the radar video display allowing the display to indicate the direction the radar from which the NRZL data is received is pointing.