Patents by Inventor Alberto Duenas
Alberto Duenas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11076157Abstract: A hardware encoder has a block analyzer configured in hardware to selectively alter encoding parameters of a coding unit or a coding tree unit in response to encoder conditions and an analysis of the coding unit or coding tree unit. A stream analyzer operating as a software process on one or more computational cores selectively alters encoding parameters in response to evaluation of parameters associated with a stream of video data.Type: GrantFiled: May 3, 2017Date of Patent: July 27, 2021Assignee: NGCodec Inc.Inventors: Alberto Duenas, Frank Bossen
-
Patent number: 10805635Abstract: A hardware encoder has a bit estimation block to compute an estimated bit size for a Coding Tree Unit (CTU). A CTU bit size limit manager selects quantization parameters for use in quantization. The quantization parameters are selected based upon the estimated bit size to insure that the CTU in coded form will not exceed a CTU bit size limit.Type: GrantFiled: March 22, 2017Date of Patent: October 13, 2020Assignee: NGCodec Inc.Inventors: Alberto Duenas, Frank Bossen
-
Patent number: 10621731Abstract: A hardware video encoder includes a first inter-picture prediction search processor to perform at least one coarse search at a designated block size. The at least one coarse search utilizes a down-sampled version of an image to determine motion vectors. A second inter-picture prediction search processor performs motion vector refinement searches on pixels of the image for multiple block sizes. Searches of at least one block size utilize the motion vectors. A third inter-picture prediction search processor performs fractional pixel motion vector refinement searches on interpolated values of the pixels of the image for multiple block sizes in parallel.Type: GrantFiled: May 22, 2017Date of Patent: April 14, 2020Assignee: NGCodec Inc.Inventors: Alberto Duenas, Frank Bossen
-
Patent number: 10091514Abstract: A hardware video encoder includes an intra search block operating on a source picture to produce pairs of intra prediction mode indices and rate-distortion values for different block sizes. The pairs of intra prediction mode indices and rate-distortion values for the different block sizes are computed in parallel based upon the source picture. An inter search block produces pairs of motion vectors and rate-distortion values for different block sizes. The pairs of motion vectors and rate-distortion values for the different block sizes are computed in parallel.Type: GrantFiled: August 18, 2016Date of Patent: October 2, 2018Assignee: NGCodec Inc.Inventors: Frank Bossen, Alberto Duenas
-
Patent number: 10070128Abstract: A hardware processor has a per block size intra mode processor to perform intra mode searches for best intra modes for different block sizes. A cost processor computes cost values for the different block sizes, where the cost values are based upon at least one of a simplified distortion estimate or a simplified bit rate estimate. A selective block merger processor establishes a final partition of blocks.Type: GrantFiled: May 4, 2016Date of Patent: September 4, 2018Assignee: NGCodec Inc.Inventors: Kemal Ugur, Alberto Duenas
-
Patent number: 9781477Abstract: Systems and methods for transmitting a multimedia stream over a communication link on a network are disclosed. The systems and methods adaptively adjust encoding parameters based on monitoring changing conditions of the network. A transmitter includes an adaptive-rate encoder that adaptively adjusts a video encoding bit rate in response to changing conditions of the communication link. The encoder maintains tight rate control by utilizing slice processing and sub-frame rate adaptation, as well as maintaining a headroom between the channel bit rate and the video encoding bit rate. The adaptive-rate encoder also embeds intra-frame constraints in predictive frames traffic in order to reduce latency.Type: GrantFiled: May 5, 2010Date of Patent: October 3, 2017Assignee: Cavium, Inc.Inventors: Farhad Mighani, Alberto Duenas, Nguyen Nguyen, Gorka Garcia
-
Publication number: 20160330445Abstract: A hardware processor has a per block size intra mode processor to perform intra mode searches for best intra modes for different block sizes. A cost processor computes cost values for the different block sizes, where the cost values are based upon at least one of a simplified distortion estimate or a simplified bit rate estimate. A selective block merger processor establishes a final partition of blocks.Type: ApplicationFiled: May 4, 2016Publication date: November 10, 2016Applicant: NGCodec Inc.Inventors: Kemal Ugur, Alberto Duenas
-
Publication number: 20160269747Abstract: An intra-picture prediction processor includes a first stage processing block to process incoming video data to identify intermediate intra-picture prediction information including a best intra-picture prediction angle and a best intra-picture block size. A second stage processing block operating on reconstructed blocks of video data selects final intra-picture prediction information for the reconstructed blocks of video data based upon the best intra-picture prediction angle and the best intra-picture block size.Type: ApplicationFiled: March 10, 2016Publication date: September 15, 2016Applicant: NGCodec Inc.Inventors: Alberto Duenas, Adam Malamy, Kemal Ugur
-
Publication number: 20160269748Abstract: An intra-picture prediction processor includes a first block size calculation kernel to produce a first intra-picture prediction angle for a first block size. The first block size calculation kernel utilizes a pre-defined set of intra-picture prediction modes to identify a first stage angle. The first block size calculation kernel utilizes the first stage angle to select a set of adjacent prediction angles to identify the first intra-picture prediction angle for the first block size. A second block size calculation kernel produces a second intra-picture prediction angle for a second block size larger than the first block size. The second block size calculation kernel utilizes the first intra-picture prediction angle to select a set of adjacent angles to identify the second intra-picture prediction angle for the second block size.Type: ApplicationFiled: March 10, 2016Publication date: September 15, 2016Applicant: NGCodec Inc.Inventors: Alberto Duenas, Kemal Ugur
-
Patent number: 9445107Abstract: An encoder within a video transmission system controls the bit allocation at a sub-frame level. A frame is divided into smaller blocks, known as rate control blocks. Rate control blocks are used as the basic unit for bit allocation. This bit allocation achieves the target bit rate desired by the system as well as meet latency constraints. The encoder uses the slice partitioning capabilities to generate the rate control blocks using one or more slices of the image frame. This feature allows the decoder to decode the rate control blocks independently and ensures that the encoded data size for each rate control block is allocated. The encoder also detects the overflow condition for the buffer and performing an operation to avoid the overflow condition based on whether the image frame is an inter-frame or an intra-frame.Type: GrantFiled: September 8, 2014Date of Patent: September 13, 2016Assignee: Cavium, Inc.Inventors: Alberto Duenas, Francisco J. Roncero Izquierdo, Gorka Garcia
-
Patent number: 9432668Abstract: A hardware video encoder includes an intra search block operating on a source picture to produce pairs of intra prediction mode indices and rate-distortion values for different block sizes. The pairs of intra prediction mode indices and rate-distortion values for the different block sizes are computed in parallel based upon the source picture. An inter search block produces pairs of motion vectors and rate-distortion values for different block sizes. The pairs of motion vectors and rate-distortion values for the different block sizes are computed in parallel.Type: GrantFiled: March 15, 2016Date of Patent: August 30, 2016Assignee: NGCodec Inc.Inventors: Frank Bossen, Alberto Duenas
-
Patent number: 9094669Abstract: A video transmission system includes an encoder to receive video images, and encode them for transfer to a decoder. The video images include macroblocks having data that are encoded according to a prediction mode, such as inter-prediction or intra-prediction. A bit estimator for the encoded macroblock within the encoder estimates a size for the encoded macroblock and predicts whether it will be an illegal size. The bit estimator applies a bit estimation function using a number of header bits and a number of texture bits based on the prediction mode and transformed data of the macroblock.Type: GrantFiled: July 11, 2014Date of Patent: July 28, 2015Assignee: Cavium, Inc.Inventors: Alberto Duenas, Francisco J. Roncero Izquierdo
-
Patent number: 9025672Abstract: A video transmission system includes an encoder and a decoder. Data may be lost during video encoding and transmission, which leads to errors in reconstructing the video images by the decoder. A return channel couples the encoder and decoder so that errors detected by the decoder are made available to the encoder. Depending on the percentage of the image not received, refresh operations are performed. An on-demand intra-refresh operation is done when the percentage of the image needed to be refreshed is below a specified level. A random intra-refresh operation is done when the percentage of the image needed to be refreshed exceeds the level.Type: GrantFiled: May 4, 2011Date of Patent: May 5, 2015Assignee: Cavium, Inc.Inventors: Alberto Duenas, Francisco J. Roncero Izquierdo, Gorka Garcia
-
Patent number: 9025665Abstract: A video transmission system includes an encoder to receive video images, and encode them for transfer to a decoder. The video images include macroblocks having data that are encoded according to a prediction mode, such as inter-prediction or intra-prediction. A bit estimator for the encoded macroblock within the encoder estimates a size for the encoded macroblock and predicts whether it will be an illegal size. The bit estimator applies a bit estimation function using a number of header bits and a number of texture bits based on the prediction mode and transformed data of the macroblock.Type: GrantFiled: July 1, 2011Date of Patent: May 5, 2015Assignee: Cavium, Inc.Inventors: Alberto Duenas, Francisco J. Roncero Izquierdo
-
Publication number: 20140376640Abstract: An encoder within a video transmission system controls the bit allocation at a sub-frame level. A frame is divided into smaller blocks, known as rate control blocks. Rate control blocks are used as the basic unit for bit allocation. This bit allocation achieves the target bit rate desired by the system as well as meet latency constraints. The encoder uses the slice partitioning capabilities to generate the rate control blocks using one or more slices of the image frame. This feature allows the decoder to decode the rate control blocks independently and ensures that the encoded data size for each rate control block is allocated. The encoder also detects the overflow condition for the buffer and performing an operation to avoid the overflow condition based on whether the image frame is an inter-frame or an intra-frame.Type: ApplicationFiled: September 8, 2014Publication date: December 25, 2014Applicant: Cavium, Inc.Inventors: Alberto Duenas, Francisco J. Roncero Izquierdo, Gorka Garcia
-
Publication number: 20140321550Abstract: A video transmission system includes an encoder to receive video images, and encode them for transfer to a decoder. The video images include macroblocks having data that are encoded according to a prediction mode, such as inter-prediction or intra-prediction. A bit estimator for the encoded macroblock within the encoder estimates a size for the encoded macroblock and predicts whether it will be an illegal size. The bit estimator applies a bit estimation function using a number of header bits and a number of texture bits based on the prediction mode and transformed data of the macroblock.Type: ApplicationFiled: July 11, 2014Publication date: October 30, 2014Applicant: CAVIUM, INC.Inventors: Alberto Duenas, Francisco J. Roncero Izquierdo
-
Patent number: 8831108Abstract: An encoder within a video transmission system controls the bit allocation at a sub-frame level. A frame is divided into smaller blocks, known as rate control blocks. Rate control blocks are used as the basic unit for bit allocation. This bit allocation achieves the target bit rate desired by the system as well as meet latency constraints. The encoder uses the slice partitioning capabilities to generate the rate control blocks using one or more slices of the image frame. This feature allows the decoder to decode the rate control blocks independently and ensures that the encoded data size for each rate control block is allocated. The encoder also detects the overflow condition for the buffer and performing an operation to avoid the overflow condition based on whether the image frame is an inter-frame or a intra-frame.Type: GrantFiled: May 4, 2011Date of Patent: September 9, 2014Assignee: Cavium, Inc.Inventors: Alberto Duenas, Francisco J. Roncero Izquierdo, Gorka Garcia
-
Publication number: 20130003844Abstract: A video transmission system includes an encoder to receive video images, and encode them for transfer to a decoder. The video images include macroblocks having data that are encoded according to a prediction mode, such as inter-prediction or intra-prediction. A bit estimator for the encoded macroblock within the encoder estimates a size for the encoded macroblock and predicts whether it will be an illegal size. The bit estimator applies a bit estimation function using a number of header bits and a number of texture bits based on the prediction mode and transformed data of the macroblock.Type: ApplicationFiled: July 1, 2011Publication date: January 3, 2013Inventors: Alberto Duenas, Francisco J. Roncero Izquierdo
-
Publication number: 20120281756Abstract: A video transmission system includes an encoder and a decoder. As video data is encoded, the system uses temporal or spatial prediction to reduce the number of bits needed to encode frames. An increase in the complexity of the data results when motion vectors or patterns occurs. The complexity change is detected for intra-frame and inter-frame frames by monitoring statistics and motion estimation information for the macroblocks within the current frame. Once the complexity change is detected, the encoder or the system takes actions to prevent latency, bit rate fluctuation or quality degradation for the video transmission.Type: ApplicationFiled: May 4, 2011Publication date: November 8, 2012Inventors: Francisco J. Roncero Izquierdo, Alberto Duenas
-
Publication number: 20120281757Abstract: A video transmission system includes an encoder and a decoder. As video data is encoded, the system uses temporal or spatial prediction to reduce the number of bits needed to encode frames. An increase in the complexity of the data results when a scene change occurs. The scene change is detected for intra-frame and inter-frame frames by monitoring statistics for the macroblocks within the current frame. Once the scene change is detected, the encoder or the system takes actions to prevent latency, bit rate fluctuation or quality degradation for the video transmission.Type: ApplicationFiled: May 4, 2011Publication date: November 8, 2012Inventors: Francisco J. Roncero Izquierdo, Alberto Duenas