Abstract: An exciter device for transmitting vibration to a support is described. The exciter device comprises a housing, wherein a portion of the housing comprises an interior surface and an exterior surface, the interior surface disposed inside the housing and the exterior surface disposed outside the housing. An exciter is disposed on the interior surface. A rubber suspension is integrated into the portion of the housing. A printed circuit board comprising an amplifier forms a top of the exciter device.

Abstract: An exciter device for transmitting vibration to a support is described. The exciter device comprises a housing, wherein a portion of the housing comprises an interior surface and an exterior surface, the interior surface disposed inside the housing and the exterior surface disposed outside the housing. An exciter is disposed on the interior surface. A rubber suspension is integrated into the portion of the housing. A printed circuit board comprising an amplifier forms a top of the exciter device.

Abstract: Technologies for secure offline activation of hardware features include a target computing device having a platform controller hub (PCH) including a converged security and manageability engine (CSME) and a number of in-field programmable fuses (IFPs). During assembly of the target computing device by an original equipment manufacturer (OEM), the CSME is provided a list of hardware features to be activated. The CSME configures the IFPs to enable the requested features, generates a digital receipt including the activated features and a unique device ID, and signs the receipt using a unique device key. Signed receipts may be periodically submitted to a vendor computing device, which verifies the signed receipts, extracts the active feature list, and bills the OEM for activated features of the PCHs. The vendor computing device may bill the OEM a maximum price for PCHs for which there is no associated signed receipt. Other embodiments are described and claimed.

Abstract: In some embodiments a secure permit request to change a hardware configuration is created. The secure permit request is sent to a remote location, and a permit sent from the remote location in response to the permit request is received. The hardware configuration is changed in response to the received permit. Other embodiments are described and claimed.

Abstract: In one embodiment, the present invention includes a method for obtaining a pre-boot authentication (PBA) image from a non-volatile storage that is configured with full disk encryption (FDE), and storing the PBA image in a memory. Then a callback protocol can be performed between a loader executing on an engine of a chipset and an integrity checker of a third party that provided the PBA image to confirm integrity of the PBA image, the PBA image is executed if the integrity is confirmed, and otherwise it is deleted. Other embodiments are described and claimed.

Abstract: Methods and apparatus for mixing encrypted data with unencrypted data are disclosed. A disclosed system receives data from a first media source, such as DVD-Audio content, and encrypts the data from the first media source using a key stream to form an encrypted data stream. The disclosed system may separate the encrypted data stream into a plurality of encrypted data streams and may combine the plurality of encrypted data streams with an unencrypted data stream associated with a second media source to form a mixed data stream. The mixed data stream is formed without decrypting the plurality of encrypted data streams and is transmitted to hardware or a hardware driver.

Abstract: Methods and apparatus for mixing encrypted data with unencrypted data are disclosed. A disclosed system receives data from a first media source, such as DVD-Audio content, and encrypts the data from the first media source using a key stream to form an encrypted data stream. The disclosed system may separate the encrypted data stream into a plurality of encrypted data streams and may combine the plurality of encrypted data streams with an unencrypted data stream associated with a second media source to form a mixed data stream. The mixed data stream is formed without decrypting the plurality of encrypted data streams and is transmitted to hardware or a hardware driver.

Abstract: Methods and apparatus for mixing encrypted data with unencrypted data are disclosed. A disclosed system receives data from a first media source, such as DVD-Audio content, and encrypts the data from the first media source using a key stream to form an encrypted data stream. The disclosed system may separate the encrypted data stream into a plurality of encrypted data streams and may combine the plurality of encrypted data streams with an unencrypted data stream associated with a second media source to form a mixed data stream. The mixed data stream is formed without decrypting the plurality of encrypted data streams and is transmitted to hardware or a hardware driver.

Abstract: In some embodiments a secure permit request to change a hardware configuration is created. The secure permit request is sent to a remote location, and a permit sent from the remote location in response to the permit request is received. The hardware configuration is changed in response to the received permit. Other embodiments are described and claimed.

Abstract: In one embodiment, the present invention includes a method for obtaining a pre-boot authentication (PBA) image from a non-volatile storage that is configured with full disk encryption (FDE), and storing the PBA image in a memory. Then a callback protocol can be performed between a loader executing on an engine of a chipset and an integrity checker of a third party that provided the PBA image to confirm integrity of the PBA image, the PBA image is executed if the integrity is confirmed, and otherwise it is deleted. Other embodiments are described and claimed.

Abstract: Secure storage and retrieval of a unique value associated with a device to/from a memory of a processing system. In at least one embodiment, the device needs to be able to access the unique value across processing system resets, and the device does not have sufficient non-volatile storage to store the unique value itself. Instead, the unique value is stored in the processing system memory in such a way that the stored unique value does not create a unique identifier for the processing system or the device. A pseudo-randomly or randomly generated initialization vector may be used to vary an encrypted data structure used to store the unique value in the memory.

Abstract: Embodiments of the present invention provide for enumerating codecs on a link. A controller asserts a synchronization signal, and drives one or more control lines associated with selected codecs to a first state. The enumeration period is defined by a predefined number of clock periods after de-assertion of the synchronization signal. During the enumeration period, the controller drives the control lines of codecs that are supported to a second state. If the control line for a codec is not pulled to the second state during the enumeration period, that codec will act disabled, ignoring all inputs, and will not participate in any link activity, until the next reset, where it will again look for an assertion of its control line.

Abstract: An approach to selecting either an actual stepping revision ID value or a compatible revision ID value to be readable by a processor through a revision ID register.

Abstract: A Bus Driver implements an arbitration mechanism to allow both the system management interrupt (SMI) and the Bus Driver to cooperatively use a Bus host controller hardware. This mechanism employs a hardware-based semaphore (status bit) to allow either the SMI or the driver to claim ownership of the Bus host controller for an arbitrary period of time. While either the SMI or the driver may own the status bit, the other party must poll the bit until ownership is achieved. For the SMI, this involves scheduling a periodic SMI interrupt. The driver performs self arbitration of claiming the status bit to provide the periodic SMI interrupt the opportunity to claim the bit. The mechanism allows the SMI access to the Bus host controller in a “timely” manner, while minimizing impact to driver access to the Bus host controller, which could impact driver Bus transaction throughput.

Abstract: Embodiments of the present invention provide for enumerating codecs on a link. A controller asserts a synchronization signal, and drives one or more control lines associated with selected codecs to a first state. The enumeration period is defined by a predefined number of clock periods after de-assertion of the synchronization signal. During the enumeration period, the controller drives the control lines of codecs that are supported to a second state. If the control line for a codec is not pulled to the second state during the enumeration period, that codec will act disabled, ignoring all inputs, and will not participate in any link activity, until the next reset, where it will again look for an assertion of its control line.

Abstract: A Bus Driver implements an arbitration mechanism to allow both the system management interrupt (SMI) and the Bus Driver to cooperatively use a Bus host controller hardware. This mechanism employs a hardware-based semaphore (status bit) to allow either the SMI or the driver to claim ownership of the Bus host controller for an arbitrary period of time. While either the SMI or the driver may own the status bit, the other party must poll the bit until ownership is achieved. For the SMI, this involves scheduling a periodic SMI interrupt. The driver performs self arbitration of claiming the status bit to provide the periodic SMI interrupt the opportunity to claim the bit. The mechanism allows the SMI access to the Bus host controller in a “timely” manner, while minimizing impact to driver access to the Bus host controller, which could impact driver Bus transaction throughput.

Abstract: An approach to selecting either an actual stepping revision ID value or a compatible revision ID value to be readable by a processor through a revision ID register.

Abstract: In one embodiment of the present invention, an output device sends a spurious data sample in place of a first data sample to be sent from a queue if the queue is in a state of underflow during which the first data sample is not available to be sent. The buffer is to store data samples for an isochronous data transmission. Circuitry skips the first data sample when the first data sample becomes available in the queue so that synchronization for subsequent data samples sent from the queue is preserved. In another embodiment of the present invention, an input device advances an input buffer pointer to point to a next location in a memory in response to receiving a data sample at a queue during a state of overflow. The input buffer pointer indicates a location in the memory to which a next data sample is to be sent from the queue. The queue stores data samples for an isochronous data transmission. By advancing the input buffer pointer, synchronization for subsequent data samples is preserved.

Abstract: A wake up circuit for a computer system with a codec controller. The circuit provides a wakeup signal to the computer system when a codec detects an event that requires the system to become active. This signal is provided whether the communications link between the codecs and their controller is active or inactive. When the link is inactive, as indicated by the absence of a bit clock, a data signal on any of the codec input lines triggers the controller to send a power activation signal to the system and to initiate an activation of the codec link. If the link is already active, the general purpose input status change bit is transmitted to the controller, which writes it into a register that is used to trigger a power activation signal to the system. An enable input permits the wakeup signal to be enabled or disabled under program control. The wakeup signal can be used to trigger a system management interrupt or other interrupt suitable for initiating a system resume function.

Abstract: In one embodiment of the present invention, an output device sends a spurious data sample in place of a first data sample to be sent from a queue if the queue is in a state of underflow during which the first data sample is not available to be sent. The buffer is to store data samples for an isochronous data transmission. Circuitry skips the first data sample when the first data sample becomes available in the queue so that synchronization for subsequent data samples sent from the queue is preserved. In another embodiment of the present invention, an input device advances an input buffer pointer to point to a next location in a memory in response to receiving a data sample at a queue during a state of overflow. The input buffer pointer indicates a location in the memory to which a next data sample is to be sent from the queue. The queue stores data samples for an isochronous data transmission. By advancing the input buffer pointer, synchronization for subsequent data samples is preserved.