Abstract: A program-controlled unit has debug resources for monitoring the operations proceeding within the program-controlled unit. The program-controlled unit described is distinguished by the fact that the debug resources contain a CPU, and/or that a portion of the debug resources is provided for monitoring the operations proceeding within the remainder of the debug resources. Debug resources constructed in this way make it possible for errors occurring in program-controlled units to be localized and eliminated rapidly and simply under all circumstances.

Abstract: An electronic network is disclosed. One embodiment includes a plurality of network devices, a bus for transferring data between the network devices and a bus master for controlling the transfer of data between the network devices. Each network device is identified using one unique identification code. At least one number generator is provided, which is adapted to generate a number upon a request from the bus master. The received number is used as identification code of the respective network device.

Abstract: An integrated circuit having a subordinate test interface and method for transmitting digital data is disclosed. The integrated circuit includes at least one test interface that is adapted to write and read data in and from a data memory, the at least one test interface includes, for transmitting and receiving data of different content categories, one signal line each for every content category. The integrated circuit further includes an interface module for receiving and transmitting data, and that the interface module is, via the signal lines, connected with the test interface for transmitting the data of the different content categories.

Abstract: A program-controlled unit (e.g., a microcontroller) in which trace information (e.g., selected addresses, data and/or control signals) that is processed by a core and which can be used to trace the profile of the processes occurring within the program-controlled unit, are stored and/or output from the program-controlled unit along with corresponding identification codes that are used by an external debugging system to identify the trace information.

Abstract: A system and method for testing an integrated circuit is disclosed. One embodiment includes at least one central processing unit, at least one volatile memory area, and an interface is suggested, wherein the memory area is adapted to be written by the interface. The system includes a test device connected with the integrated circuit which is configured to stop the program execution, write data in the volatile memory by using the interface, and start the program execution.

Abstract: The described program controlled unit has first supply voltage connections for applying a first supply voltage to the program controlled unit and second supply voltage connections for applying a second supply voltage to the program controlled unit. The full OCDS module or a part of the OCDS module is supplied with power by the second supply voltage. The remaining components of the program controlled unit are supplied with power by the first supply voltage. This means that the entire OCDS module or part of the OCDS module can actually be supplied with power, before the time at which the remaining parts of the program controlled unit are supplied with power. A debugger supplies the OCDS module with control information that prescribes a particular state of the OCDS module.

Abstract: A programmable unit is described having one or more program running units for running a program, with at least one of the program running units having an associated stopping device by which it is possible to stop the running of the program by the program running unit with which that stopping device is associated. The described programmable unit is distinguished in that the stopping device can also cause other components of the programmable unit to be stopped, in addition to the program running unit with which it is associated.

Abstract: A configuration contains a test unit that, during emulation, replaces a program-controlled unit that is used in normal operation of the system containing the program-controlled unit. The test unit has a first program-controlled unit and a second program-controlled unit. The first program-controlled unit contains only some of the components of the program-controlled unit replaced by the test unit, and the second program-controlled unit contains those components of the program-controlled unit replaced by the test unit that are not contained in the first program-controlled unit. In addition, the first program-controlled unit contains a control device which monitors whether one of the components of the first program-controlled unit requests access to a component not present in the first program-controlled unit and which, if this is so, prompts appropriate access to the corresponding component in the second program-controlled unit.

Abstract: A semiconductor device with test interface, as well as to a method for operating a semiconductor device is disclosed. In one embodiment, in a test operating mode, the semiconductor device is, via a first pin, supplied with a work cycle signal synchronized with a test environment and, via at least one second pin, with test data. In accordance with a first embodiment it is suggested, so as to reduce the number of pins, that the work cycle signal is simultaneously used as test data clock signal.

Abstract: The aim of the invention is to produce a rounding off on a diesel piston comprising a combustion recess and valve recesses that lie at a slant in relation to the piston floor. The rounding off should not significantly increase particle emissions. To this end, the edge of the recess is rounded off in the area of the valve recesses in a special machining phase, the cutting edges of the cutting tool being guided in one or more planes that are parallel to the inclined valve recess surface.

Abstract: In an integrated circuit having a first circuit part and at least one second circuit part, which is assigned to a specific functionality of the first circuit part, on one and the same silicon wafer, of which the first circuit part and the at least one circuit part are arranged in non-overlapping, mutually separate regions of the silicon wafer and are connected to one another via connecting elements or lines, during the fabrication, for each exposure plane, with the exception of the exposure plane used for the fabrication of the connecting elements or lines, use is made in each case of a first exposure mask intended for the first circuit part and a second exposure mask intended for the second circuit part. These first and second exposure masks may be arranged on a common reticle for a respective exposure plane.

Abstract: The program-controlled unit, during the execution of the program, can switch itself to a state in which selected elements that can be connected to form scan chains or all of the elements can no longer change their state, according to a predetermined result. If these elements are then connected to form a scan chain and read out, the data obtained as a result can be used to identify and/or analyze any errors existing in the program-controlled unit rapidly and reliably.

Abstract: A method for system simulation, which is distinguished by a first sequence of steps for simulating a microcontroller/microprocessor and peripheral modules using predetermined signal patterns and by a second sequence of steps for interrogating and evaluating system states that are brought about by the simulation. In order to carry out the second sequence, the first sequence is interrupted as dictated by markers that have been inserted into the first sequence, and the second sequence is executed in an accelerated operational mode that has been adapted to the evaluation.

Abstract: A program-controlled unit has debug resources that outputs trace information including selected addresses, data and/or control signals and that can be used to trace the course of the operations occurring within the program-controlled. The debug resources monitor whether a predefined change in the level of one or more predefined bits of the addresses, data and/or control signals contained in the trace information has taken place, and start or terminate the generation of trace information as a function of the result of this check. Additionally or alternatively, the trace information that is output is a component of messages having a variable length portion that contains the trace information. Additionally or alternatively, the trace information that is output is a component of messages, and it is possible to determine which trace information is located at which point within the message.

Abstract: A program-controlled unit is described. The program-controlled unit has a central processing unit (CPU), peripheral units that are connected to the CPU via an internal bus, and debug resources that can be used to trace and influence operations taking place in the program-controlled unit. The program-controlled unit that is described is characterized in that the debug resources and the peripheral units, which output data from the program-controlled unit and/or can receive and pass on data which is supplied to the program-controlled unit from the outside, are connected to one another via a second internal bus. The data that is to be transmitted between the debug resources and devices provided outside the program-controlled unit are transmitted via the second internal bus and individual, a plurality of, or all the peripheral units connected thereto.

Abstract: An emulation method and a semiconductor chip for emulating an integrated circuit, in particular a program-controlled device, by means of an emulation circuit, which is arranged on the same semiconductor chip as the integrated circuit, has a trace memory and is coupled to the integrated circuit to be emulated via an internal interface, said method having the following method steps of: emulating the integrated circuit using the emulation circuit, continually storing the emulation results obtained during the emulation in the trace memory until the trace memory is full; interrupting the emulation; reading out the emulation results from the trace memory; and continuing the emulation of the integrated circuit.

Abstract: Method of determining information about the processes which run in a program-controlled unit during the execution of a program by the program-controlled unit A description is given of a method of determining information about the processes which run in a program-controlled unit during the execution of a program by the program-controlled unit. The method described is distinguished by the fact that identical items of individual information about processes of the same type are combined to form a single item of overall information. As a result, the desired information about the processes of interest can be procured with considerably less expenditure than was the case hitherto.

Abstract: A method in which data is stored or transferred together with an information message on the basis of which it can be determined in which order, at which time, and/or during which time span, the data concerned has been acquired, stored or transferred.

Abstract: A semiconductor chip is characterized in that some of the contact points for connecting the semiconductor chip to other components of a system that contains the chip is provided for making a connection with another semiconductor chip that can be mounted onto the first semiconductor chip and that enhances the functions and/or the power of the latter. Such a configuration allows a small semiconductor chip to be produced in a cost-effective manner, using minimal resources and the chip can be enhanced by any number of modules, without modifying the characteristics of the system, in which it is contained.

Abstract: In an integrated circuit having a first circuit part and at least one second circuit part, which is assigned to a specific functionality of the first circuit part, on one and the same silicon wafer, of which the first circuit part and the at least one circuit part are arranged in non-overlapping, mutually separate regions of the silicon wafer and are connected to one another via connecting elements or lines, during the fabrication, for each exposure plane, with the exception of the exposure plane used for the fabrication of the connecting elements or lines, use is made in each case of a first exposure mask intended for the first circuit part and a second exposure mask intended for the second circuit part. These first and second exposure masks may be arranged on a common reticle for a respective exposure plane.