Patents by Inventor Alejandro Duran

Alejandro Duran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9760356
    Abstract: Systems and methods may provide for identifying a nested loop iteration space in user code, wherein the nested loop iteration space includes a plurality of outer loop iterations, and distributing iterations from the nested loop iteration space across a plurality of threads, wherein each thread is assigned a group of outer loop iterations. Additionally, a compiler output may be automatically generated, wherein the compiler output contains serial code corresponding to each group of outer loop iterations and de-linearization code to be executed outside the plurality of outer loop iterations. In one example, the de-linearization code includes index recovery code that is positioned before one or more instances of the serial code in the compiler output.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: September 12, 2017
    Assignee: Intel Corporation
    Inventor: Alejandro Duran Gonzalez
  • Patent number: 9626299
    Abstract: Data and a memory address associated with the data may be received. A hash value of the memory address may be calculated by using a first hash function. The data may be stored at a cache set of a plurality of cache sets of a cache memory based on the hash value calculated from the first hash function. A determination may be made as to whether the storing of the data at the cache set of the plurality of cache sets of the cache memory is associated with a conflict ratio of the cache memory exceeding a threshold ratio. In response to the conflict ratio exceeding the threshold ratio, a second hash value of a second memory address associated with a second data may be calculated by using a second hash function that is different than the first hash function.
    Type: Grant
    Filed: May 1, 2015
    Date of Patent: April 18, 2017
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Alejandro Duran Gonzalez
  • Publication number: 20160321187
    Abstract: Data and a memory address associated with the data may be received. A hash value of the memory address may be calculated by using a first hash function. The data may be stored at a cache set of a plurality of cache sets of a cache memory based on the hash value calculated from the first hash function. A determination may be made as to whether the storing of the data at the cache set of the plurality of cache sets of the cache memory is associated with a conflict ratio of the cache memory exceeding a threshold ratio. In response to the conflict ratio exceeding the threshold ratio, a second hash value of a second memory address associated with a second data may be calculated by using a second hash function that is different than the first hash function.
    Type: Application
    Filed: May 1, 2015
    Publication date: November 3, 2016
    Inventors: FRANCESC GUIM BERNAT, ALEJANDRO DURAN GONZALEZ
  • Publication number: 20160283278
    Abstract: Methods and apparatuses relating to translating a logical thread identification to a physical thread identification. A processor may include a plurality of cores that include a buffer, and a thread mapping hardware unit to: return a physical thread identification in response to a logical thread identification sent to a buffer of a first core when the buffer includes a logical to physical thread mapping for the logical thread identification, and send a request to the buffers of the other cores when the first core's buffer does not include the logical to physical thread mapping for the logical thread identification, wherein each of the other cores are to send an unknown identification response if their buffer does not include the logical thread identification and at least one of the other cores is to send the physical thread identification to the first core if its buffer includes the logical thread identification.
    Type: Application
    Filed: February 26, 2016
    Publication date: September 29, 2016
    Inventors: Alejandro Duran Gonzalez, Francesc Guim Bernat
  • Publication number: 20160170812
    Abstract: Technologies for multithreaded synchronization and work stealing include a computing device executing two or more threads in a thread team. A thread executes all of the tasks in its task queue and then exchanges its associated task stolen flag value with false and stores that value in a temporary flag. Subsequently, the thread enters a basic synchronization barrier. The computing device performs a logical-OR reduction over the temporary flags of the thread team to produce a reduction value. While waiting for other threads of the thread team to enter the barrier, the thread may steal a task from a victim thread and set the task stolen flag of the victim thread to true. After exiting the basic synchronization barrier, if the reduction value is true, the thread repeats exchanging the task stolen flag value and entering the basic synchronization barrier. Other embodiments are described and claimed.
    Type: Application
    Filed: December 12, 2014
    Publication date: June 16, 2016
    Inventors: Arch D. Robison, Alejandro Duran Gonzalez
  • Patent number: 9348658
    Abstract: Technologies for multithreaded synchronization and work stealing include a computing device executing two or more threads in a thread team. A thread executes all of the tasks in its task queue and then exchanges its associated task stolen flag value with false and stores that value in a temporary flag. Subsequently, the thread enters a basic synchronization barrier. The computing device performs a logical-OR reduction over the temporary flags of the thread team to produce a reduction value. While waiting for other threads of the thread team to enter the barrier, the thread may steal a task from a victim thread and set the task stolen flag of the victim thread to true. After exiting the basic synchronization barrier, if the reduction value is true, the thread repeats exchanging the task stolen flag value and entering the basic synchronization barrier. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: May 24, 2016
    Assignee: Intel Corporation
    Inventors: Arch D. Robison, Alejandro Duran Gonzalez
  • Publication number: 20160085530
    Abstract: Systems and methods may provide for identifying a nested loop iteration space in user code, wherein the nested loop iteration space includes a plurality of outer loop iterations, and distributing iterations from the nested loop iteration space across a plurality of threads, wherein each thread is assigned a group of outer loop iterations. Additionally, a compiler output may be automatically generated, wherein the compiler output contains serial code corresponding to each group of outer loop iterations and de-linearization code to be executed outside the plurality of outer loop iterations. In one example, the de-linearization code includes index recovery code that is positioned before one or more instances of the serial code in the compiler output.
    Type: Application
    Filed: September 23, 2014
    Publication date: March 24, 2016
    Inventor: Alejandro Duran Gonzalez
  • Publication number: 20080228888
    Abstract: The present invention a method by which the sender of an instant message can designate an alternate recipient of the message in the event the initial recipient does not respond to the message within a predetermined time period. The sender can create a list of one or more alternate recipients for a message. The sender can also specify a response time for the message. If the initial recipient does not response to the message within the defined time period, the message will be sent to a designated alternate recipient. In this invention, there can be multiple alternate recipients. Each alternate can receive the message or there can be a priority among the alternate recipients.
    Type: Application
    Filed: May 28, 2008
    Publication date: September 18, 2008
    Inventors: Liliana Orozco, Christopher Hoang Doan, Alejandro Duran, Kristin Lee Neiman
  • Patent number: 7195063
    Abstract: A method and apparatus for sampling formation fluid includes drawing formation fluid from the subterranean formation into the downhole tool and collecting the formation fluid in a sample chamber. An exit flow line is operatively connected to the sample chamber for selectively removing a contaminated and/or clean portion of the formation fluid from the sample chamber whereby contamination is removed from the sample chamber. For example, a clean portion of the formation fluid may be passed to another sample chamber for collection, or a contaminated portion may be dumped into the borehole.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: March 27, 2007
    Assignee: Schlumberger Technology Corporation
    Inventors: Matheus Nogueira, James J. Dunlap, Andrew J. Carnegie, Alejandro Duran, Edward Harrigan, Ricardo Vasques, Nicolas Adur
  • Publication number: 20060168049
    Abstract: The present invention a method by which the sender of an instant message can designate an alternate recipient of the message in the event the initial recipient does not respond to the message within a predetermined time period. The sender can create a list of one or more alternate recipients for a message. The sender can also specify a response time for the message. If the initial recipient does not response to the message within the defined time period, the message will be sent to a designated alternate recipient. In this invention, there can be multiple alternate recipients. Each alternate can receive the message or there can be a priority among the alternate recipients.
    Type: Application
    Filed: January 27, 2005
    Publication date: July 27, 2006
    Inventors: Liliana Orozco, Christopher Doan, Alejandro Duran, Kristin Neiman
  • Patent number: 6941547
    Abstract: Apparatus and method for porting applications to different platforms. The apparatus and method use a mapping table function that receives source filenames and directory structures and maps them to filenames and directory structures appropriate for a target platform. In a preferred embodiment, the apparatus and method map flexible filenames and directory structures, such as is found with the Unix filesystem, to more restrictive filenames and directory structures, such as is found with the OS/400 filesystem. In this way, an application developer may make use of the more flexible filesystem of conventions such as Unix, when developing application files and use the apparatus and method to automatically handle converting these more flexible filenames and directory structures to the more restrictive filenames and directory structures of platforms to which the application is to be ported.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: September 6, 2005
    Assignee: International Business Machines Corporation
    Inventor: Aldo Alejandro Duran
  • Publication number: 20050082059
    Abstract: A method and apparatus is provided to sample formation fluid. Formation fluid is drawn from the subterranean formation into the downhole tool and collected in a sample chamber. An exit flow line is operatively connected to the sample chamber for selectively removing a contaminated and/or clean portion of the formation fluid from the sample chamber whereby contamination is removed from the sample chamber. For example, a clean portion of the formation fluid may be passed to another sample chamber for collection, or a contaminated portion may be dumped into the borehole.
    Type: Application
    Filed: July 30, 2004
    Publication date: April 21, 2005
    Applicant: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: Matheus Nogueira, James Dunlap, Andrew Carnegie, Alejandro Duran, Edward Harrigan, Ricardo Vasques
  • Publication number: 20030009747
    Abstract: An apparatus and method for porting applications to different platforms are provided. The apparatus and method make use of a mapping table function that receives source filenames and directory structures and maps them to filenames and directory structures appropriate for a target platform. In a preferred embodiment, the apparatus and method map flexible filenames and directory structures, such as is found with the Unix filesystem, to more restrictive filenames and directory structures, such as is found with the OS/400 filesystem. In this way, an application developer can develop application files without being limited to the most restrictive filesystem conventions.
    Type: Application
    Filed: June 25, 2001
    Publication date: January 9, 2003
    Applicant: International Business Machines Corporation
    Inventor: Aldo Alejandro Duran