Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit (IC) and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.