Abstract: A flash analog-to-digital converter (ADC) receives an input control signal and performs coarse tuning of a frequency of an output signal, produced between first and second nodes having an inductance coupled therebetween. The flash ADC quantizes an operating frequency range for the output signal produced between the first and second nodes as M·?f, where M is an integer from 0 to N?1, where N is a number of intervals into which a frequency range for the output signal is divided, and where ?f is a resulting frequency step produced by the quantizing. The value of M is generated based upon the input control signal and a word controlling switches of a plurality of switched capacitance circuits associated with the first and second nodes to close ones of those switches associated with the control word to coarsely tune the frequency of the output signal.

Abstract: A PLL has a tunable resonator including an inductance and variable capacitance coupled between first and second nodes, and capacitances coupleable between the nodes. A control node is coupled to the variable capacitance and receives a control signal for tuning the resonator. A biasing circuit biases the resonator to generate an output. A PFD circuit senses timing offset of the output with respect to a reference and asserts first or second digital signals dependent on the sign of the timing offset. A charge pump generates the control signal based on the first and second digital signals. A timer asserts a timing signal in response to a pulse sensed in a reset signal and de-asserts the timing signal after a time interval. A calibrator couples selected capacitances between the first and second nodes as a function of the second digital signal, in response to assertion of the timing signal.

Abstract: Disclosed herein is a tunable resonant circuit including an inductance directly electrically connected in series between first and second nodes, a variable capacitance directly electrically connected between the first and second nodes, and a set of switched capacitances coupled between the first and second nodes. The set of switched capacitances includes a plurality of capacitance units, each capacitance unit comprising a first capacitance for that capacitance unit directly electrically connected between the first node and a switch and a second capacitance for the capacitance unit directly electrically connected between the switch and the second node. Control circuitry is configured to receive an input control signal and connected to control the switches of the set of switched capacitances. A biasing circuit is directly electrically connected to the tunable resonance circuit at the first and second nodes.

Abstract: A first RF-to-DC circuit receives a radiofrequency signal and produces a first converted signal delivered to an energy storage circuit. A second RF-to-DC circuit, which is a down-scaled replica of the first RF-to-DC circuit, produces a second converted signal from the radiofrequency signal that is indicative of an open-circuit voltage of the first RF-to-DC circuit. The first RF-to-DC section includes N sub-stages, with a sub-set of sub-stages being selectively activatable. A window comparison of the second converted signal generates a first signal and a second signal indicative of whether the second converted signal is within a range of values proportional to a voltage reference signal. The sub-set of sub-stages is selectively deactivated, respectively activated, when the performed window comparison has a first result, respectively, a second result.

Abstract: Disclosed herein is a tunable resonant circuit including an inductance directly electrically connected in series between first and second nodes, a variable capacitance directly electrically connected between the first and second nodes, and a set of switched capacitances coupled between the first and second nodes. The set of switched capacitances includes a plurality of capacitance units, each capacitance unit comprising a first capacitance for that capacitance unit directly electrically connected between the first node and a switch and a second capacitance for the capacitance unit directly electrically connected between the switch and the second node. Control circuitry is configured to receive an input control signal and connected to control the switches of the set of switched capacitances. A biasing circuit is directly electrically connected to the tunable resonance circuit at the first and second nodes.

Abstract: An oscillator includes a tunable resonant circuit having an inductance and a variable capacitance coupled between first and second nodes, and a set of capacitances selectively coupleable between the first and second nodes. An input control node receiving an input control signal is coupled to the variable capacitance and set of capacitances. The tunable resonant circuit is tunable based on the input control signal. A biasing circuit biases the tunable resonant circuit to generate a variable-frequency output signal between the first and second nodes. A voltage divider generates a set of different voltage thresholds, and a set of comparator circuits with hysteresis compares the input control signal to the set of different voltage thresholds to generate a set of control signals. The capacitances in the set of capacitances are selectively coupleable between the first and second nodes as a function of control signals in the set of control signals.

Abstract: An input receives a radio frequency (RF) signal having an interfering component superimposed thereon. The RF signal is mixed with a local oscillator (LO) signal and down-converted to an intermediate frequency (IF) to generate a mixed signal which includes a frequency down-converted interfering component. The mixed signal is amplified by an amplifier to generate an output signal. A feedback loop processes the output signal to generate a correction signal for cancelling the frequency down-converted interfering component at the input of the amplifier. The feedback loop includes a low-pass filter and a amplification circuit which outputs the correction signal.

Abstract: An oscillator includes a tunable resonant circuit having an inductance and a variable capacitance coupled between first and second nodes, and a set of capacitances selectively coupleable between the first and second nodes. An input control node receiving an input control signal is coupled to the variable capacitance and set of capacitances. The tunable resonant circuit is tunable based on the input control signal. A biasing circuit biases the tunable resonant circuit to generate a variable-frequency output signal between the first and second nodes. A voltage divider generates a set of different voltage thresholds, and a set of comparator circuits with hysteresis compares the input control signal to the set of different voltage thresholds to generate a set of control signals. The capacitances in the set of capacitances are selectively coupleable between the first and second nodes as a function of control signals in the set of control signals.

Abstract: A PLL has a tunable resonator including an inductance and variable capacitance coupled between first and second nodes, and capacitances coupleable between the nodes. A control node is coupled to the variable capacitance and receives a control signal for tuning the resonator. A biasing circuit biases the resonator to generate an output. A PFD circuit senses timing offset of the output with respect to a reference and asserts first or second digital signals dependent on the sign of the timing offset. A charge pump generates the control signal based on the first and second digital signals. A timer asserts a timing signal in response to a pulse sensed in a reset signal and de-asserts the timing signal after a time interval. A calibrator couples selected capacitances between the first and second nodes as a function of the second digital signal, in response to assertion of the timing signal.

Abstract: A radiofrequency-powered device such as a wireless passive sensor node, for instance, comprises a radiofrequency energy harvesting circuit configured to be coupled to an antenna to harvest radiofrequency energy captured by the antenna from a radiofrequency signal. The radiofrequency energy harvesting circuit is configured to be coupled to an energy storage component to store therein energy harvested via the radiofrequency energy harvesting circuit. The device comprises user circuitry configured to be supplied with energy harvested via the radiofrequency energy harvesting circuit and to operate in accordance with one of a plurality of configurations as a function of configuration data supplied thereto. A receiver circuit coupled to the radiofrequency energy harvesting circuit is configured to receive a configuration data signal modulating the radiofrequency signal and supply to the user circuitry configuration data extracted from the configuration data signal received.

Abstract: A first Radio-Frequency-to-Direct-Current (RF2DC) transducer receives a first signal from a sensing antenna and generates energy stored by an energy storage circuit. An energy transfer circuit is controllably switched between an energy storage state where energy is stored in the energy storage state and an energy transfer state where stored energy is transferred to a load. The voltage at the energy storage circuit is alternatively variable between an upper value and a lower value around a voltage setting point. A second RF2DC transducer, which is a down-scaled replica of the first RF2DC transducer, produces a second signal indicative of an open-circuit voltage of the first RF2DC transducer. The voltage setting point is set as a function of the second signal indicative of the open-circuit voltage of the first RF2DC transducer.

Abstract: A first RF-to-DC circuit receives a radiofrequency signal and produces a first converted signal delivered to an energy storage circuit. A second RF-to-DC circuit, which is a down-scaled replica of the first RF-to-DC circuit, produces a second converted signal from the radiofrequency signal that is indicative of an open-circuit voltage of the first RF-to-DC circuit. The first RF-to-DC section includes N sub-stages, with a sub-set of sub-stages being selectively activatable. A window comparison of the second converted signal generates a first signal and a second signal indicative of whether the second converted signal is within a range of values proportional to a voltage reference signal. The sub-set of sub-stages is selectively deactivated, respectively activated, when the performed window comparison has a first result, respectively, a second result.

Abstract: A method of making an integrated circuit (IC) includes forming circuitry over a top surface of a semiconductor substrate having the top surface and an opposite bottom surface. An antenna is formed in an interconnect layer formed above the semiconductor substrate, where the antenna is coupled to circuitry. A seal ring is formed around a periphery of the interconnect layer. The seal ring is disposed around the antenna and the circuitry. A trench with a solid-state insulating material is formed. The trench extends vertically into the semiconductor substrate and extends laterally across the IC.

Abstract: An electromagnetic interposer circuit is attachable to an article that is also equipped with an anti-counterfeit and anti-theft/tracking electromagnetic marker. The interposer circuit includes a first interface for exchanging electrical signals with the marker at a first, shorter, communication range and a second interface coupled to the first interface for exchanging electromagnetic signals with a reader at a second, longer, communication range. The first and second interfaces exchange signals with the marker and the reader, respectively, over a radiofrequency bandwidth that includes a first frequency band and a second frequency band. A filter circuit block within the interposer circuit between the first interface and the second interface operates to block the transfer of signals between the first interface and the second interface over the first frequency band.

Abstract: A radiofrequency-powered device such as a wireless passive sensor node, for instance, comprises a radiofrequency energy harvesting circuit configured to be coupled to an antenna to harvest radiofrequency energy captured by the antenna from a radiofrequency signal. The radiofrequency energy harvesting circuit is configured to be coupled to an energy storage component to store therein energy harvested via the radiofrequency energy harvesting circuit. The device comprises user circuitry configured to be supplied with energy harvested via the radiofrequency energy harvesting circuit and to operate in accordance with one of a plurality of configurations as a function of configuration data supplied thereto. A receiver circuit coupled to the radiofrequency energy harvesting circuit is configured to receive a configuration data signal modulating the radiofrequency signal and supply to the user circuitry configuration data extracted from the configuration data signal received.

Abstract: A first Radio-Frequency-to-Direct-Current (RF2DC) transducer receives a first signal from a sensing antenna and generates energy stored by an energy storage circuit. An energy transfer circuit is controllably switched between an energy storage state where energy is stored in the energy storage state and an energy transfer state where stored energy is transferred to a load. The voltage at the energy storage circuit is alternatively variable between an upper value and a lower value around a voltage setting point. A second RF2DC transducer, which is a down-scaled replica of the first RF2DC transducer, produces a second signal indicative of an open-circuit voltage of the first RF2DC transducer. The voltage setting point is set as a function of the second signal indicative of the open-circuit voltage of the first RF2DC transducer.

Abstract: An input receives a radio frequency (RF) signal having an interfering component superimposed thereon. The RF signal is mixed with a local oscillator (LO) signal and down-converted to an intermediate frequency (IF) to generate a mixed signal which includes a frequency down-converted interfering component. The mixed signal is amplified by an amplifier to generate an output signal. A feedback loop processes the output signal to generate a correction signal for cancelling the frequency down-converted interfering component at the input of the amplifier. The feedback loop includes a low-pass filter and a amplification circuit which outputs the correction signal.

Abstract: A cascade of amplifier stages has a differential input and a differential output. The cascade of amplifier stages includes at least one differential amplifier circuit including first and second transistors, at least one of the first and second transistors having a control terminal and a body terminal. A mismatch between the first and second transistors generates an input offset. A feedback network couples the differential output to the body terminal in order to cancel the input offset. The feedback network includes a low-pass filter and a differential amplifier stage.

Abstract: A probe card for integrated circuit testing includes a printed circuit support and a probe head having a first surface mounted to a surface of the printed circuit support. A flexible substrate is positioned adjacent to a second surface of the probe head and includes at least one flexible extension which extends beyond an edge of the probe head and includes a bend to make contact with the surface of the printed circuit support. The flexible substrate further includes a test antenna configured to support a wireless communications channel with an integrated circuit under test. The integrated circuit under test includes at least one conductive structure that extends in the peripheral portion on different planes of metallizations to form an integrated antenna that is coupled for communication and/or power transfer to the test antenna.

Abstract: An electromagnetic interposer circuit is attachable to an article that is also equipped with an anti-counterfeit and anti-theft/tracking electromagnetic marker. The interposer circuit includes a first interface for exchanging electrical signals with the marker at a first, shorter, communication range and a second interface coupled to the first interface for exchanging electromagnetic signals with a reader at a second, longer, communication range. The first and second interfaces exchange signals with the marker and the reader, respectively, over a radiofrequency bandwidth that includes a first frequency band and a second frequency band. A filter circuit block within the interposer circuit between the first interface and the second interface operates to block the transfer of signals between the first interface and the second interface over the first frequency band.