Patents by Inventor Alessandro Forin

Alessandro Forin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090133042
    Abstract: The present invention is directed to a loadable virtual memory manager, and generally to a computer operating system capable of supporting application programs running in a computer having a working memory, the computer operating system including a kernel resident in the working memory at run time, and a loadable virtual memory manager resident at link time outside of the working memory and dynamically loadable into the working memory at run time upon demand of one of the application programs. The kernel includes a loader for loading the virtual memory manager into the working memory in response to a demand from one of the application programs. The computer is able to access a storage memory separate from the working memory, the loadable virtual memory manager residing at link time in the storage memory. The loader loads the virtual memory manager from the storage memory to the working memory.
    Type: Application
    Filed: January 23, 2009
    Publication date: May 21, 2009
    Applicant: Microsoft Corporation
    Inventors: Alessandro Forin, Johannes V. Helander
  • Patent number: 7529909
    Abstract: Described is microprocessor architecture that includes at least one reconfigurable execution path (e.g., implemented via FPGAs or CPLDs). When an instruction is fetched, a mechanism determines whether the reconfigurable execution path (and/or which path) will handle that instruction. A content addressable memory may be used to determine the execution path when fed the instruction's operational code, or an arbiter and multiplexer may resolve conflicts if multiple instruction decode blocks recognize the same instruction. The execution path may be dynamically reconfigured, activated or deactivated as needed, such as to extend an instruction set, to optimize instructions for a particular application program, to implement a peripheral device, to provide parallel computing, and/or based on power consumption and/or processing power needs. Security may be provided by having the reconfigurable execution path loaded from an extension file that is associated with metadata, including security information.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: May 5, 2009
    Assignee: Microsoft Corporation
    Inventors: Richard Neil Pittman, Alessandro Forin, Nathaniel L. Lynch
  • Patent number: 7409694
    Abstract: The present invention is directed to a loadable virtual memory manager, and generally to a computer operating system capable of supporting application programs running in a computer having a working memory, the computer operating system including a kernel resident in the working memory at run time, and a loadable virtual memory manager resident at link time outside of the working memory and dynamically loadable into the working memory at run time upon demand of one of the application programs. The kernel includes a loader for loading the virtual memory manager into the working memory in response to a demand from one of the application programs. The computer is able to access a storage memory separate from the working memory, the loadable virtual memory manager residing at link time in the storage memory. The loader loads the virtual memory manager from the storage memory to the working memory.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: August 5, 2008
    Assignee: Microsoft Corporation
    Inventors: Alessandro Forin, Johannes V. Helander
  • Publication number: 20080162891
    Abstract: Described is microprocessor architecture that includes at least one reconfigurable execution path (e.g., implemented via FPGAs or CPLDs). When an instruction is fetched, a mechanism determines whether the reconfigurable execution path (and/or which path) will handle that instruction. A content addressable memory may be used to determine the execution path when fed the instruction's operational code, or an arbiter and multiplexer may resolve conflicts if multiple instruction decode blocks recognize the same instruction. The execution path may be dynamically reconfigured, activated or deactivated as needed, such as to extend an instruction set, to optimize instructions for a particular application program, to implement a peripheral device, to provide parallel computing, and/or based on power consumption and/or processing power needs. Security may be provided by having the reconfigurable execution path loaded from an extension file that is associated with metadata, including security information.
    Type: Application
    Filed: December 28, 2006
    Publication date: July 3, 2008
    Applicant: Microsoft Corporation
    Inventors: Richard Neil Pittman, Alessandro Forin, Nathaniel L. Lynch
  • Publication number: 20080052711
    Abstract: The present invention is directed to a loadable virtual memory manager, and generally to a computer operating system capable of supporting application programs running in a computer having a working memory, the computer operating system including a kernel resident in the working memory at run time, and a loadable virtual memory manager resident at link time outside of the working memory and dynamically loadable into the working memory at run time upon demand of one of the application programs. The kernel includes a loader for loading the virtual memory manager into the working memory in response to a demand from one of the application programs. The computer is able to access a storage memory separate from the working memory, the loadable virtual memory manager residing at link time in the storage memory. The loader loads the virtual memory manager from the storage memory to the working memory.
    Type: Application
    Filed: October 31, 2007
    Publication date: February 28, 2008
    Applicant: Microsoft Corporation
    Inventors: Alessandro Forin, Johannes Helander
  • Publication number: 20070256087
    Abstract: A method of producing an executable image from an object file without shared library support from the operating system, wherein the executable image requires a shared library file in order to resolve at least one of the symbols called for in the object file. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing an instruction to make an indirect jump to a location in a shared library through an import section of the file. A method for optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing plural sections with number-filled padding between the end of each section and a succeeding page boundary. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a memory sharable with other executables.
    Type: Application
    Filed: August 20, 2004
    Publication date: November 1, 2007
    Applicant: Microsoft Corporation
    Inventors: Alessandro Forin, Johannes Helander
  • Publication number: 20070180434
    Abstract: A post-compilation tool can rewrite executable images produced by a compiler. The tool can add extension definitions, insert extension-trigger instructions, and add a security signature. Operating system software may be notified of extension capabilities when loading the executable image, and may proceed to load an appropriate processor extension. The operating system software can manage availability of processor extensions on behalf of the applications.
    Type: Application
    Filed: February 2, 2006
    Publication date: August 2, 2007
    Applicant: Microsoft Corporation
    Inventors: Alessandro Forin, Nathaniel Lynch, Richard Rashid
  • Patent number: 7246353
    Abstract: A method and system for managing the execution of threads uses a single scheduler for both threads and work items. Objects representing the threads and the work items are either maintained in separate queues or are stored together in a single queue. Each thread object or work item object may contain information that allows the scheduler to determine what order to execute the corresponding threads or to process the corresponding work items.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: July 17, 2007
    Assignee: Microsoft Corporation
    Inventors: Alessandro Forin, Johannes V. Helander, Paul T. Pham
  • Patent number: 7246182
    Abstract: Multiple non-blocking FIFO queues are concurrently maintained using atomic compare-and-swap (CAS) operations. In accordance with the invention, each queue provides direct access to the nodes stored therein to an application or thread, so that each thread may enqueue and dequeue nodes that it may choose. The prior art merely provided access to the values stored in the node. In order to avoid anomalies, the queue is never allowed to become empty by requiring the presence of at least a dummy node in the queue. The ABA problem is solved by requiring that the next pointer of the tail node in each queue point to a “magic number” unique to the particular queue, such as the pointer to the queue head or the address of the queue head, for example. This obviates any need to maintain a separate count for each node.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: July 17, 2007
    Assignee: Microsoft Corporation
    Inventors: Alessandro Forin, Andrew Raffman
  • Patent number: 7159222
    Abstract: In accordance with another aspect, the invention is embodied in a computer operating system capable of supporting plural objects running in a computer having a working memory, the computer operating system including a kernel resident in the working memory at link time, and a loadable mutation object resident at link time outside of the working memory and dynamically loadable into the working memory at run time upon demand of one of the application programs, the mutation object including an interface with methods for mutating any one of the plural objects. The kernel includes a loader for loading the mutation object into the working memory in response to a demand from one of the plural objects. The computer further includes a storage memory separate from the working memory, the loadable mutation object residing at link time in the storage memory.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: January 2, 2007
    Assignee: Microsoft Corporation
    Inventors: Alessandro Forin, Johannes V. Helander
  • Patent number: 7143421
    Abstract: The invention is embodied in software executable on a computer having a working memory with demand-loadable components initially stored outside of the working memory, each component having an entry point including a constructor for an object. Preferably, the demand-loadable components are initially provided in a memory within the computer or a location external of the computer. A Namespace in the working memory provides access in the working memory to the components as they become needed by applications running in the computer. The Namespace provides the access by managing demand-loading and unloading of the components in the working memory.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: November 28, 2006
    Assignee: Microsoft Corporation
    Inventors: Alessandro Forin, Johannes V. Helander, Andrew R. Raffman, Gilad Odinak
  • Patent number: 6981051
    Abstract: A method and system for directing data transfers between applications and devices residing on different computers or devices using an adaptive flow control protocol has been described. When an application or device requests to transfer data with another application or device, adaptive flow control protocol adapts the way data is transferred by observing when an application that is receiving data posts a receive buffer and detects the receive buffer's size. Based upon the application's or device's behavior, the adaptive flow control protocol transfers the data in a mode that is best suited for the application.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: December 27, 2005
    Assignee: Microsoft Corporation
    Inventors: Vadim Eydelman, Khawar M. Zuberi, Michael T. Massa, Alessandro Forin
  • Publication number: 20050226406
    Abstract: A method of producing an executable image from an object file without shared library support from the operating system, wherein the executable image requires a shared library file in order to resolve at least one of the symbols called for in the object file. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing an instruction to make an indirect jump to a location in a shared library through an import section of the file. A w method for optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing plural sections with number-filled padding between the end of each section and a succeeding page boundary. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a memory sharable with other executables.
    Type: Application
    Filed: May 23, 2005
    Publication date: October 13, 2005
    Applicant: Microsoft Corporation
    Inventors: Alessandro Forin, Johannes Helander
  • Publication number: 20050223018
    Abstract: A method of producing an executable image from an object file without shared library support from the operating system, wherein the executable image requires a shared library file in order to resolve at least one of the symbols called for in the object file. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing an instruction to make an indirect jump to a location in a shared library through an import section of the file. A method for optimizing the loading of a previously linked file into working memory in a computer for executing in a single address space of the working memory, the file containing plural sections with number-filled padding between the end of each section and a succeeding page boundary. A method of optimizing the loading of a previously linked file into working memory in a computer for executing in a memory sharable with other executables.
    Type: Application
    Filed: May 23, 2005
    Publication date: October 6, 2005
    Applicant: Microsoft Corporation
    Inventors: Alessandro Forin, Johannes Helander
  • Patent number: 6889269
    Abstract: Multiple non-blocking FIFO queues are concurrently maintained using atomic compare-and-swap (CAS) operations. In accordance with the invention, each queue provides direct access to the nodes stored therein to an application or thread, so that each thread may enqueue and dequeue nodes that it may choose. The prior art merely provided access to the values stored in the node. In order to avoid anomalies, the queue is never allowed to become empty by requiring the presence of at least a dummy node in the queue. The ABA problem is solved by requiring that the next pointer of the tail node in each queue point to a “magic number” unique to the particular queue, such as the pointer to the queue head or the address of the queue head, for example. This obviates any need to maintain a separate count for each node.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: May 3, 2005
    Assignee: Microsoft Corporation
    Inventors: Alessandro Forin, Andrew Raffman
  • Publication number: 20050071857
    Abstract: A method for improving the performance of a distributed object model over a network is disclosed. A client computer contains a client object which can call an interface on a server object located on a server computer. Rather than copying all of the call parameters into an RPC buffer for transmission across the network, a network interface card with scatter-gather capability can be used. The RPC data can contain only a list of pointers into the client memory and a size of each parameter. The network interface card can then grab the parameters directly from the client memory using the list in the RPC buffer without the need to copy the data itself. At the server side, the network interface card can place the parameters into an RPC buffer, or if the size is known beforehand, directly into the server memory. The server can also access the parameters directly from the RPC buffer.
    Type: Application
    Filed: October 14, 2004
    Publication date: March 31, 2005
    Applicant: Microsoft Corporation
    Inventors: Yi-Min Wang, Galen Hunt, Alessandro Forin
  • Publication number: 20050066082
    Abstract: Multiple non-blocking FIFO queues are concurrently maintained using atomic compare-and-swap (CAS) operations. In accordance with the invention, each queue provides direct access to the nodes stored therein to an application or thread, so that each thread may enqueue and dequeue nodes that it may choose. The prior art merely provided access to the values stored in the node. In order to avoid anomalies, the queue is never allowed to become empty by requiring the presence of at least a dummy node in the queue. The ABA problem is solved by requiring that the next pointer of the tail node in each queue point to a “magic number” unique to the particular queue, such as the pointer to the queue head or the address of the queue head, for example. This obviates any need to maintain a separate count for each node.
    Type: Application
    Filed: October 15, 2004
    Publication date: March 24, 2005
    Applicant: Microsoft Corporation
    Inventors: Alessandro Forin, Andrew Raffman
  • Patent number: 6826763
    Abstract: A method for improving the performance of a distributed object model over a network is disclosed. A client computer contains a client object which can call an interface on a server object located on a server computer. Rather than copying all of the call parameters into an RPC buffer for transmission across the network, a network interface card with scatter-gather capability can be used. The RPC data can contain only a list of pointers into the client memory and a size of each parameter. The network interface card can then grab the parameters directly from the client memory using the list in the RPC buffer without the need to copy the data itself. At the server side, the network interface card can place the parameters into an RPC buffer, or if the size is known beforehand, directly into the server memory. The server can also access the parameters directly from the RPC buffer.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: November 30, 2004
    Assignee: Microsoft Corporation
    Inventors: Yi-Min Wang, Galen C. Hunt, Alessandro Forin
  • Publication number: 20040162930
    Abstract: The present invention is directed to a loadable virtual memory manager, and generally to a computer operating system capable of supporting application programs running in a computer having a working memory, the computer operating system including a kernel resident in the working memory at run time, and a loadable virtual memory manager resident at link time outside of the working memory and dynamically loadable into the working memory at run time upon demand of one of the application programs. The kernel includes a loader for loading the virtual memory manager into the working memory in response to a demand from one of the application programs. The computer is able to access a storage memory separate from the working memory, the loadable virtual memory manager residing at link time in the storage memory. The loader loads the virtual memory manager from the storage memory to the working memory.
    Type: Application
    Filed: January 8, 2004
    Publication date: August 19, 2004
    Applicant: Microsoft Corporation
    Inventors: Alessandro Forin, Johannes V. Helander
  • Patent number: 6760787
    Abstract: A recoverable I/O request processor includes computer-executable instructions for processing I/O requests, such as requests to send or receive data through a network. The recoverable I/O request processor translates virtual memory addresses to physical memory addresses utilizing translation tables local to an I/O device. If a local translation fails, the recoverable I/O request processor requests virtual address mapping information from the operating system.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: July 6, 2004
    Assignee: Miscrosoft Corporation
    Inventor: Alessandro Forin