Patents by Inventor Alessandro Paccagnella

Alessandro Paccagnella has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8791418
    Abstract: A two-dimensional array of memory cells may be used to implement a spatial dosimeter. The two-dimensional array of cells may be implemented by an integrated circuit memory. Because of the relatively small size of the integrated circuit memory, the resolution of the resulting array may be less than 100 nanometers. The change in threshold voltage of each of the cells, as a result of radiation exposure, may be used to calculate the dose seen at each cell, allowing dose profiles in two dimensions with sub-micrometer resolution.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: July 29, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Angelo Visconti, Mauro Bonanomi, Giorgio Cellere, Alessandro Paccagnella
  • Patent number: 7994824
    Abstract: Logic Gate (100), particularly for integrated circuits including a Boolean network (105) having at least an input (106) and having at least an output node (107) and at least a terminal (108) connected to a first node at fixed potential (109) corresponding to a first logical level of the gate. The gate is characterized by the fact that the output node (107) is connected to a first pair of switches including a first switch (101) and a second switch (102), which are activated alternately, and are connected respectively, by a respective terminal, to the first node (109) at fixed potential and to the output node (107). Between the two switches there is a second pair of switches (103, 104) connected to a second node at fixed potential (110) corresponding to a second logical level of the gate.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: August 9, 2011
    Assignee: Fabio Alessio Narino
    Inventors: Fabio Alessio Marino, Alessandro Paccagnella
  • Publication number: 20100259301
    Abstract: Logic Gate (100), particularly for integrated circuits including a Boolean network (105) having at least an input (106) and having at least an output node (107) and at least a terminal (108) connected to a first node at fixed potential (109) corresponding to a first logical level of the gate. The gate is characterized by the fact that the output node (107) is connected to a first pair of switches including a first switch (101) and a second switch (102), which are activated alternately, and are connected respectively, by a respective terminal, to the first node (109) at fixed potential and to the output node (107). Between the two switches there is a second pair of switches (103, 104) connected to a second node at fixed potential (110) corresponding to a second logical level of the gate.
    Type: Application
    Filed: November 14, 2008
    Publication date: October 14, 2010
    Inventors: Fabio Alessio Marino, Alessandro Paccagnella
  • Publication number: 20100140488
    Abstract: A two-dimensional array of memory cells may be used to implement a spatial dosimeter. The two-dimensional array of cells may be implemented by an integrated circuit memory Because of the relatively small size of the integrated circuit memory, the resolution of the resulting array may be less than 100 nanometers. The change in threshold voltage of each of the cells, as a result of radiation exposure, may be used to calculate the dose seen at each cell, allowing dose profiles in two dimensions with sub-micrometer resolution.
    Type: Application
    Filed: December 8, 2008
    Publication date: June 10, 2010
    Inventors: Angelo Visconti, Mauro Bonanomi, Giorgio Cellere, Alessandro Paccagnella