Patents by Inventor Alessandro Venca
Alessandro Venca has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20150038095Abstract: In one embodiment, an apparatus includes an upconversion unit configured to upconvert a baseband signal to a radio frequency (RF) signal. A plurality of baluns for a plurality of wireless bands are provided. Multiplexing circuitry is coupled to the plurality of baluns where the upconversion unit is coupled to each balun through the multiplexing circuitry. The multiplexing circuitry is configured to multiplex the radio frequency signal from the upconversion unit to one of the plurality of baluns based on a wireless band being used.Type: ApplicationFiled: October 20, 2014Publication date: February 5, 2015Inventors: Gregory Uehara, Chao Yang, Ruoxin Jiang, Fernando De Bernardinis, Alessandro Venca, Rinaldo Castello, Marc Leroux, Brian Brunn
-
Patent number: 8896387Abstract: In one embodiment, a voltage controlled oscillator (VCO) is provided. The VCO includes a tank circuit. Also, the VCO includes a first pair of transistors. The drains of the first pair of transistors are coupled to the tank circuit and the gates of the first pair of transistors are cross-coupled with the drains of the first pair of transistors. The first pair of transistors each have a first threshold voltage. The VCO further includes a second pair of transistors. The drains of the second pair of transistors are respectively coupled to the sources of the first pair of transistors and the gates of the second pair of transistors are respectively coupled to the gates of the first pair of transistors, The second pair of transistors each have a second threshold voltage higher than the first threshold voltage.Type: GrantFiled: December 19, 2011Date of Patent: November 25, 2014Assignee: Marvell International Ltd.Inventors: Alessandro Venca, Enrico Sacchi, Sehat Sutardja
-
Patent number: 8868015Abstract: In one embodiment, an apparatus includes an upconversion unit configured to upconvert a baseband signal to a radio frequency (RF) signal. A plurality of baluns for a plurality of wireless bands are provided. Multiplexing circuitry is coupled to the plurality of baluns where the upconversion unit is coupled to each balun through the multiplexing circuitry. The multiplexing circuitry is configured to multiplex the radio frequency signal from the upconversion unit to one of the plurality of baluns based on a wireless band being used.Type: GrantFiled: May 19, 2010Date of Patent: October 21, 2014Assignee: Marvell World Trade Ltd.Inventors: Gregory Uehara, Chao Yang, Ruoxin Jiang, Fernando De Bernardinis, Alessandro Venca, Rinaldo Castello, Marc Leroux, Brian Brunn
-
Patent number: 8400197Abstract: In one embodiment, an apparatus includes a jitter generator configured to receive a reference clock; add jitter to the reference clock; and output the reference clock with the included jitter to a phase lock loop (PLL). The PLL is used to generate a local oscillator (LO) signal for a transceiver. A jitter controller outputs a signal to the jitter generator to control a characteristic of the jitter added to the reference clock. The reference clock with the added jitter is used to reduce a fractional spur caused by a radio frequency (RF) attacker coupling into the PLL.Type: GrantFiled: July 26, 2011Date of Patent: March 19, 2013Assignee: Marvell World Trade Ltd.Inventors: Luca Romano, Alessandro Venca, Stefano Dal Toso, Antonio Milani, Brian Brunn
-
Publication number: 20120025880Abstract: In one embodiment, an apparatus includes a jitter generator configured to receive a reference clock; add jitter to the reference clock; and output the reference clock with the included jitter to a phase lock loop (PLL). The PLL is used to generate a local oscillator (LO) signal for a transceiver. A jitter controller outputs a signal to the jitter generator to control a characteristic of the jitter added to the reference clock. The reference clock with the added jitter is used to reduce a fractional spur caused by a radio frequency (RF) attacker coupling into the PLL.Type: ApplicationFiled: July 26, 2011Publication date: February 2, 2012Inventors: Luca Romano, Alessandro Venca, Stefano Dal Toso, Antonio Milani, Brian Brunn
-
Patent number: 8081039Abstract: In one embodiment, a voltage controlled oscillator (VCO) is provided. The VCO includes a tank circuit. Also, the VCO includes a first pair of transistors. The drains of the first pair of transistors are coupled to the tank circuit and the gates of the first pair of transistors are cross-coupled with the drains of the first pair of transistors. The first pair of transistors each have a first threshold voltage. The VCO further includes a second pair of transistors. The drains of the second pair of transistors are respectively coupled to the sources of the first pair of transistors and the gates of the second pair of transistors are respectively coupled to the gates of the first pair of transistors, The second pair of transistors each have a second threshold voltage higher than the first threshold voltage.Type: GrantFiled: June 3, 2010Date of Patent: December 20, 2011Assignee: Marvell International Ltd.Inventors: Alessandro Venca, Enrico Sacchi, Sehat Sutardja
-
Patent number: 7880545Abstract: The present invention provides compensation for circuits. In one embodiment, a compensation circuit has a first terminal coupled to an output terminal of the circuit and a second terminal coupled to feed back the output voltage to an internal node. A damping circuit may also be coupled to the output terminal. The damping circuit adds a pole and a zero to the transfer function of the circuit. In one embodiment, the damping circuit modifies the effect of the output impedance of a load on the transfer function to increase the phase margin of the circuit such that the circuit remains stable over an increased range of output capacitor values.Type: GrantFiled: March 3, 2009Date of Patent: February 1, 2011Assignee: Marvell International Ltd.Inventors: Alessandro Venca, Daniele Ottini, Francesco Rezzi, Rinaldo Castello
-
Publication number: 20100295599Abstract: In one embodiment, an apparatus includes an upconversion unit configured to upconvert a baseband signal to a radio frequency (RF) signal. A plurality of baluns for a plurality of wireless bands are provided. Multiplexing circuitry is coupled to the plurality of baluns where the upconversion unit is coupled to each balun through the multiplexing circuitry. The multiplexing circuitry is configured to multiplex the radio frequency signal from the upconversion unit to one of the plurality of baluns based on a wireless band being used.Type: ApplicationFiled: May 19, 2010Publication date: November 25, 2010Inventors: Gregory Uehara, Chao Yang, Ruoxin Jiang, Fernando De Bernardinis, Alessandro Venca, Rinaldo Castello, Marc Leroux, Brian Brunn
-
Patent number: 7564638Abstract: An amplifying circuit and method are disclosed for amplifying electrical signals, such as electrical signals generated by the read head of a disk drive. The circuit includes a pair of cross-coupled differential amplifier circuits. Each differential amplifier circuit is asymmetric, including two input transistors of different transistor types. For instance, a first of the two input transistors of each differential amplifier circuit may be a bipolar transistor and a second of the two input transistors may be a field effect transistor. By utilizing asymmetric differential amplifier circuits, a relatively wider operating frequency range is obtained.Type: GrantFiled: May 23, 2006Date of Patent: July 21, 2009Assignee: STMicroelectronics, Inc.Inventors: Baris Posat, Kemal Ozanoglu, Alessandro Venca
-
Patent number: 7375909Abstract: A write driver for driving a write current through a write head connected to the write head by an interconnect or flexible transmission line. The write driver includes a circuit matching an output impedance of the write driver to the odd characteristic impedance of the interconnect and includes a current source generating a current output to the write head. The write driver provides a current amplification effect as the output current is half the write current driven through the write coil. The impedance matching circuit includes an output resistor with a resistance equal to the odd characteristic impedance of the interconnect. The write driver includes a voltage source that operates to maintain a voltage drop of zero on the output resistor during the initial period of twice the transmission delay of the interconnect.Type: GrantFiled: April 14, 2004Date of Patent: May 20, 2008Assignee: STMicroelectronics, Inc.Inventors: Alessandro Venca, Roberto Alini, Baris Posat
-
Patent number: 7365928Abstract: A write driver driving a write current through a head connected to the write head by an interconnect. The write driver includes a circuit matching output resistance to the odd characteristic impedance of the interconnect and a voltage boosting circuit. The voltage boosting circuit in connected between a high voltage reference or supply voltage and a low voltage reference, and includes a pair of current sources, such as MOS transistors, connected to the input node of a single capacitor. During the overshoot duration, the current sources selectively operate at saturation to generate a pulsed current with an amplitude of half the load current. The recharge of the capacitor is done with the load current.Type: GrantFiled: April 13, 2005Date of Patent: April 29, 2008Assignees: STMicroelectronics, Inc., STMicroelectronics S.R.L.Inventors: Alessandro Venca, Roberto Alini, Baris Posat
-
Publication number: 20060262446Abstract: An amplifying circuit and method are disclosed for amplifying electrical signals, such as electrical signals generated by the read head of a disk drive. The circuit includes a pair of cross-coupled differential amplifier circuits. Each differential amplifier circuit is asymmetric, including two input transistors of different transistor types. For instance, a first of the two input transistors of each differential amplifier circuit may be a bipolar transistor and a second of the two input transistors may be a field effect transistor. By utilizing asymmetric differential amplifier circuits, a relatively wider operating frequency range is obtained.Type: ApplicationFiled: May 23, 2006Publication date: November 23, 2006Inventors: Baris Posat, Kemal Ozanoglu, Alessandro Venca
-
Patent number: 7099098Abstract: An amplifying circuit and method are disclosed for amplifying electrical signals, such as electrical signals generated by the read head of a disk drive. The circuit includes a pair of cross-coupled differential amplifier circuits. Each differential amplifier circuit is asymmetric, including two input transistors of different transistor types. For instance, a first of the two input transistors of each differential amplifier circuit may be a bipolar transistor and a second of the two input transistors may be a field effect transistor. By utilizing asymmetric differential amplifier circuits, a relatively wider operating frequency range is obtained.Type: GrantFiled: January 22, 2003Date of Patent: August 29, 2006Assignee: STMicroelectronics, Inc.Inventors: Baris Posat, Kemal Ozanoglu, Alessandro Venca
-
Patent number: 7061300Abstract: The invention relates to a low supply voltage analog multiplier which comprises a pair of differential cells, each cell comprising a pair of bipolar transistors with coupled emitters. A first transistor of each cell receives an input signal on its base terminal and has its collector terminal coupled to a first voltage reference through a bias member. Advantageously, the second transistor of each cell is a diode configuration, and the cells are interconnected at a common node corresponding to the base terminals of the second transistors in each pair. This multiplier can be supplied very low voltages and still exhibit a high rate of operation along with reduced harmonic distortion of the output signal, even with input signals of peak-to-peak amplitude above 600 mV.Type: GrantFiled: February 27, 2001Date of Patent: June 13, 2006Assignee: STMicroelectronics S.r.l.Inventors: Valerio Pisati, Marco Cazzaniga, Alessandro Venca
-
Patent number: 7035028Abstract: A write driver driving a write current through a head connected to the write head by an interconnect. The write driver includes a circuit matching output resistance to the odd characteristic impedance of the interconnect and a voltage boosting circuit. The voltage boosting circuit in connected between a high voltage reference or supply voltage and a low voltage reference, and includes a current source, such as a MOS transistor, connected to the input node of a capacitor. During the overshoot duration, the current source operates at saturation to generate a pulsed current with an amplitude of half the load current. The circuit includes another transistor in series with the current generator between the capacitor and the driver output. A forward bias diode is connected between the capacitor output node and high voltage reference and enters reverse bias during overshoot duration swinging the driver output voltage above supply voltage.Type: GrantFiled: May 12, 2004Date of Patent: April 25, 2006Assignee: STMicroelectronics, Inc.Inventors: Alessandro Venca, Roberto Alini, Baris Posat
-
Patent number: 6970316Abstract: A circuit and method are disclosed for relatively rapidly causing the current flowing through a write head to transition between steady states without generating an appreciable amount of capacitively-coupled noise. Embodiments of the present invention generally provide drive voltage signals to the write head that have no common mode voltage levels during transitions between steady state current levels in the write head. In other words, the drive voltage signals applied to the write head are substantially entirely differential during write head current transitions. In an exemplary embodiment of the present invention, a driver circuit includes switching circuitry connected between the terminals of the write head and reference voltage supplies, such as positive and negative voltage supplies. The driver circuit further includes timing circuitry that generates control signals for controlling the switching circuitry.Type: GrantFiled: November 9, 2001Date of Patent: November 29, 2005Assignee: STMicroelectronics, Inc.Inventors: Alessandro Venca, Baris Posat, Kemal Ozanoglu, Roberto Alini
-
Publication number: 20050254159Abstract: A write driver driving a write current through a head connected to the write head by an interconnect. The write driver includes a circuit matching output resistance to the odd characteristic impedance of the interconnect and a voltage boosting circuit. The voltage boosting circuit in connected between a high voltage reference or supply voltage and a low voltage reference, and includes a current source, such as a MOS transistor, connected to the input node of a capacitor. During the overshoot duration, the current source operates at saturation to generate a pulsed current with an amplitude of half the load current. The circuit includes another transistor in series with the current generator between the capacitor and the driver output. A forward bias diode is connected between the capacitor output node and high voltage reference and enters reverse bias during overshoot duration swinging the driver output voltage above supply voltage.Type: ApplicationFiled: May 12, 2004Publication date: November 17, 2005Inventors: Alessandro Venca, Roberto Alini, Baris Posat
-
Publication number: 20050237785Abstract: A write driver driving a write current through a head connected to the write head by an interconnect. The write driver includes a circuit matching output resistance to the odd characteristic impedance of the interconnect and a voltage boosting circuit. The voltage boosting circuit in connected between a high voltage reference or supply voltage and a low voltage reference, and includes a pair of current sources, such as MOS transistors, connected to the input node of a single capacitor. During the overshoot duration, the current sources selectively operate at saturation to generate a pulsed current with an amplitude of half the load current. The recharge of the capacitor is done with the load current.Type: ApplicationFiled: April 13, 2005Publication date: October 27, 2005Inventors: Alessandro Venca, Roberto Alini, Baris Posat
-
Publication number: 20050231843Abstract: A write driver for driving a write current through a write head connected to the write head by an interconnect or flexible transmission line. The write driver includes a circuit matching an output impedance of the write driver to the odd characteristic impedance of the interconnect and includes a current source generating a current output to the write head. The write driver provides a current amplification effect as the output current is half the write current driven through the write coil. The impedance matching circuit includes an output resistor with a resistance equal to the odd characteristic impedance of the interconnect. The write driver includes a voltage source that operates to maintain a voltage drop of zero on the output resistor during the initial period of twice the transmission delay of the interconnect.Type: ApplicationFiled: April 14, 2004Publication date: October 20, 2005Inventors: Alessandro Venca, Roberto Alini, Baris Posat
-
Patent number: 6944834Abstract: A method and system are disclosed for generating descriptions of circuits representative of the behavior of dynamic systems. A state space model representing a dynamic system may be used to generate an electronic circuit equivalent having operating characteristics equivalent to the operating characteristics of the dynamic system. The electronic circuit equivalent may be then described as a SPICE circuit description which is simulated to determine the time and frequency domain characteristics of the dynamic system.Type: GrantFiled: January 22, 2003Date of Patent: September 13, 2005Assignee: STMicroelectrontronics, Inc.Inventors: Baris Posat, Kemal Ozanoglu, Alessandro Venca