Abstract: A storage system analyzes a logical block address range of data in a resolution of a defragmentation unit. The storage system determines whether a given defragmentation unit is fragmented above a threshold and performs a defragmentation operation accordingly. Additionally or alternatively, the storage system can receive a suggested logical block address read order from a host to improve performance.

Abstract: A storage system analyzes a logical block address range of data in a resolution of a defragmentation unit. The storage system determines whether a given defragmentation unit is fragmented above a threshold and performs a defragmentation operation accordingly. Additionally or alternatively, the storage system can receive a suggested logical block address read order from a host to improve performance.

Abstract: A storage system and method for dual fast release and slow release responses are provided. In one embodiment, a storage system is provided comprising a volatile memory, a non-volatile memory, and a controller. The controller is configured to receive, from a host, a write command and data to be written in the non-volatile memory. The host comprises a command queue storing an identifier for the write command and a buffer storing a copy of the data. In response to storing the data in the volatile memory, the controller is configured to instruct the host to remove the identifier for the write command from the host's command queue. In response to successfully writing the data in the non-volatile memory, the controller is configured to instruct the host to remove the copy of the data from the host's buffer. Other embodiments are provided.

Abstract: A storage system and method for dual fast release and slow release responses are provided. In one embodiment, a storage system is provided comprising a volatile memory, a non-volatile memory, and a controller. The controller is configured to receive, from a host, a write command and data to be written in the non-volatile memory. The host comprises a command queue storing an identifier for the write command and a buffer storing a copy of the data. In response to storing the data in the volatile memory, the controller is configured to instruct the host to remove the identifier for the write command from the host's command queue. In response to successfully writing the data in the non-volatile memory, the controller is configured to instruct the host to remove the copy of the data from the host's buffer. Other embodiments are provided.

Abstract: Methods and systems are provided where a memory controller for non-volatile memory transfers data to and from random access memory over a second double data rate bus, and a host system access the random access memory over a first double data rate bus. The memory controller may transfer the data in response to a command received by the memory controller from a host system via a block storage protocol bus. Alternatively or in addition, the memory controller may transfer the data as part of caching data internal to the non-volatile memory.

Abstract: Methods and systems are provided where a memory controller for non-volatile memory transfers data to and from random access memory over a second double data rate bus, and a host system access the random access memory over a first double data rate bus. The memory controller may transfer the data in response to a command received by the memory controller from a host system via a block storage protocol bus. Alternatively or in addition, the memory controller may transfer the data as part of caching data internal to the non-volatile memory.

Abstract: Systems and methods for managing parallel access to multiple storage systems are disclosed. In one implementation, a host system operatively coupled to at least a first memory system and a second memory system separates a file into a plurality of data chunks. The host system stores a first copy of the plurality of data chunks in the first memory and stores a second copy of the plurality of data chunks in the second memory. The host reads a data chunk of the plurality of data chunks of the file from the first memory system or the second memory system based on a determination of whether the first memory system or the second memory system is able to provide the data chunk to the host system more quickly. The host system may then assemble the data of the file based on the data chunk.