Patents by Inventor ALEX THEODOSIOU

ALEX THEODOSIOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10978291
    Abstract: The invention relates to a method of pre-cleaning a semiconductor structure and to associated modular semiconductor process tools. The method includes the steps of: (i) providing a semiconductor structure having an exposed dielectric layer of an organic dielectric material, wherein the dielectric layer has one or more features formed therein which expose one or more electrically conductive structures to be pre-cleaned, in which the electrically conductive structures each include a metal layer, optionally with a barrier layer formed thereon, and the surface area of the exposed dielectric layer is greater than the surface area of the electrically conductive structures exposed by the dielectric layer; and (ii) pre-cleaning the semiconductor structure by performing an Ar/H2 sputter etch to remove material from the exposed electrically conductive structures and to remove organic dielectric material from the exposed dielectric layer.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: April 13, 2021
    Assignee: SPTS Technologies Limited
    Inventors: Alex Theodosiou, Steve Burgess
  • Patent number: 9048066
    Abstract: A method is for etching successive substrates on a platen in an inductively coupled plasma chamber in which the etching process results in carbonaceous deposits in the chamber. The method includes (a) interrupting the etching processing of substrates, (b) running an oxygen or oxygen containing plasma within the chamber and removing gaseous by-products, and (c) resuming the etch processing of substrates. The method is characterized in that it further includes the step of running an argon plasma in the chamber after step (b) with the platen biased.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: June 2, 2015
    Assignee: SPTS TECHNOLOGIES LIMITED
    Inventors: Stephen R Burgess, Alex Theodosiou
  • Publication number: 20150075973
    Abstract: The invention relates to a method of pre-cleaning a semiconductor structure and to associated modular semiconductor process tools. The method includes the steps of: (i) providing a semiconductor structure having an exposed dielectric layer of an organic dielectric material, wherein the dielectric layer has one or more features formed therein which expose one or more electrically conductive structures to be pre-cleaned, in which the electrically conductive structures each include a metal layer, optionally with a barrier layer formed thereon, and the surface area of the exposed dielectric layer is greater than the surface area of the electrically conductive structures exposed by the dielectric layer; and (ii) pre-cleaning the semiconductor structure by performing an Ar/H2 sputter etch to remove material from the exposed electrically conductive structures and to remove organic dielectric material from the exposed dielectric layer.
    Type: Application
    Filed: September 11, 2014
    Publication date: March 19, 2015
    Inventors: ALEX THEODOSIOU, STEVE BURGESS
  • Publication number: 20140008325
    Abstract: A method is for etching successive substrates on a platen in an inductively coupled plasma chamber in which the etching process results in carbonaceous deposits in the chamber. The method includes (a) interrupting the etching processing of substrates, (b) running an oxygen or oxygen containing plasma within the chamber and removing gaseous by-products, and (c) resuming the etch processing of substrates. The method is characterised in that it further includes the step of running an argon plasma in the chamber after step (b) with the platen biased.
    Type: Application
    Filed: July 3, 2013
    Publication date: January 9, 2014
    Inventors: STEPHEN R BURGESS, ALEX THEODOSIOU