Patents by Inventor Alexander B. Uan-Zo-Li
Alexander B. Uan-Zo-Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240063715Abstract: A power delivery sub-system included in a computer system employs a primary voltage regulator circuit that generates a primary supply voltage on a primary power supply node. The power delivery sub-system also includes multiple bypass voltage regulator circuits that source corresponding bypass currents to a local power supply nodes in an integrated circuit. The integrated circuit includes multiple circuit blocks coupled to corresponding ones of the local power supply nodes, and multiple local voltage regulator circuits coupled to the primary power supply node. When a voltage level of a given local power supply node drops below a threshold value, a corresponding local voltage regulator circuit sources a supply current to the given local power supply node.Type: ApplicationFiled: August 16, 2022Publication date: February 22, 2024Inventors: Alexander B. Uan-Zo-li, Shuai Jiang, Jamie L. Langlinais, Per H. Hammarlund, Hans L. Yeager, Victor Zyuban, Sung J. Kim, Wei Xu, Rohan U. Mandrekar, Sambasivan Narayan, Mohamed H. Abu-Rahma, Jaroslav Raszka, Robert O. Bruckner
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Patent number: 11476692Abstract: In some examples, an apparatus includes a battery and a dynamic voltage source coupled in series with the battery. The dynamic voltage source is to maintain (or clamp) a system voltage from going below a minimum system voltage.Type: GrantFiled: March 27, 2020Date of Patent: October 18, 2022Assignee: INTEL CORPORATIONInventors: Anil Baby, Alexander B. Uan-Zo-li, Chee Lim Nge, N V S Kumar Srighakollapu
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Patent number: 11294447Abstract: An apparatus is provided which comprises: a first circuitry to estimate variation of an internal impedance of a battery; a second circuitry to estimate a high power that the battery can supply for a first time-period, based on the estimated variation of the impedance of the battery; and a third circuitry to facilitate operation of one or more components of the apparatus in accordance with the estimated high power for the first time-period.Type: GrantFiled: June 12, 2020Date of Patent: April 5, 2022Assignee: Intel CorporationInventors: Naoki Matsumura, Brian C. Fritz, Andy Keates, Alexander B. Uan-Zo-Li
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Patent number: 11262826Abstract: In some examples, an apparatus can control power provision to a computing device. A controller is to provide power to the computing device from a first power source at a power level above a sustained power rating of the first power source for a first time period, and is to provide power to the computing device from a second power source at a power level above a sustained power rating of the second power source for a second time period after the first time period.Type: GrantFiled: January 8, 2020Date of Patent: March 1, 2022Assignee: INTEL CORPORATIONInventors: Teal Hand, Alexander B. Uan-Zo-li, Andy Keates
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Patent number: 11249537Abstract: When power is provided through a USB-C cable from a source device to a sink device, a sudden connection or disconnection of the cable between the two devices may cause a sudden power surge or power drop in at least one of those devices, leading to other problems. To avoid this sudden event from causing potential damage or disruption to one of the devices, in some embodiments a CC pin in the cable is used to announce the impending connection/disconnection, and the device may throttle back its power consumption before power is actually applied to or removed from the power pins.Type: GrantFiled: July 13, 2020Date of Patent: February 15, 2022Assignee: Intel CorporationInventors: Chee Lim Nge, Eugene Gorbatov, Zhongsheng Wang, James G. Hermerding, II, Basavaraj B. Astekar, Jenn Chuan Cheng, Chia-Hung Sophia Kuo, Ashwin Umapathy, Tin-Cheung Kung, Yifan Li, Alexander B. Uan-Zo-Li
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Patent number: 11209888Abstract: An embodiment of a semiconductor package apparatus may include technology to determine history information for a battery, predict a peak power capacity of the battery based on the history information, and set a peak power parameter based on the predicted peak power capacity.Type: GrantFiled: September 29, 2017Date of Patent: December 28, 2021Assignee: Intel CorporationInventors: James G. Hermerding, II, Alexander B. Uan-Zo-Li, Brian C. Fritz, Naoki Matsumura
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Publication number: 20210305814Abstract: In some examples, an apparatus includes a battery and a dynamic voltage source coupled in series with the battery. The dynamic voltage source is to maintain (or clamp) a system voltage from going below a minimum system voltage.Type: ApplicationFiled: March 27, 2020Publication date: September 30, 2021Inventors: Anil Baby, Alexander B. Uan-Zo-li, Chee Lim Nge, N V S Kumar Srighakollapu
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Publication number: 20200401204Abstract: An apparatus is provided which comprises: a first circuitry to estimate variation of an internal impedance of a battery; a second circuitry to estimate a high power that the battery can supply for a first time-period, based on the estimated variation of the impedance of the battery; and a third circuitry to facilitate operation of one or more components of the apparatus in accordance with the estimated high power for the first time-period.Type: ApplicationFiled: June 12, 2020Publication date: December 24, 2020Applicant: Intel CorporationInventors: Naoki Matsumura, Brian C. Fritz, Andy Keates, Alexander B. Uan-Zo-Li
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Publication number: 20200341530Abstract: When power is provided through a USB-C cable from a source device to a sink device, a sudden connection or disconnection of the cable between the two devices may cause a sudden power surge or power drop in at least one of those devices, leading to other problems. To avoid this sudden event from causing potential damage or disruption to one of the devices, in some embodiments a CC pin in the cable is used to announce the impending connection/disconnection, and the device may throttle back its power consumption before power is actually applied to or removed from the power pins.Type: ApplicationFiled: July 13, 2020Publication date: October 29, 2020Applicant: Intel CorporationInventors: Chee Lim Nge, Eugene Gorbatov, Zhongsheng Wang, James G. Hermerding, II, Basavaraj B. Astekar, Jenn Chuan Cheng, Chia-Hung Sophia Kuo, Ashwin Umapathy, Tin-Cheung Kung, Yifan Li, Alexander B. Uan-Zo-Li
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Patent number: 10790682Abstract: In some examples, a hybrid power boost peak power protection system includes an energy storage, a hybrid power boost charger to charge a battery, and a switch to couple a system load to the energy storage and to decouple the system load from the energy storage.Type: GrantFiled: March 30, 2018Date of Patent: September 29, 2020Assignee: Intel CorporationInventors: Teal Hand, Alexander B. Uan-Zo-li
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Patent number: 10739842Abstract: In some examples, a peak power system includes a plurality of system components, one or more of the system components to dynamically provide a peak power requirement of the component. The system also includes a peak power manager to receive the peak power requirement of the one or more of the system components. The peak power manager can also dynamically provide, based on a system peak power limit and based on at least one updated peak power requirement received from at least one of the one or more system components, an updated component peak power limit to one or more of the system components.Type: GrantFiled: April 1, 2017Date of Patent: August 11, 2020Assignee: Intel CorporationInventors: Eugene Gorbatov, Alexander B. Uan-Zo-Li, Muhammad Abozaed, Efraim Rotem, Tod F. Schiff, James G. Hermerding, II, Chee Lim Nge
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Patent number: 10712801Abstract: When power is provided through a USB-C cable from a source device to a sink device, a sudden connection or disconnection of the cable between the two devices may cause a sudden power surge or power drop in at least one of those devices, leading to other problems. To avoid this sudden event from causing potential damage or disruption to one of the devices, in some embodiments a CC pin in the cable is used to announce the impending connection/disconnection, and the device may throttle back its power consumption before power is actually applied to or removed from the power pins.Type: GrantFiled: June 30, 2017Date of Patent: July 14, 2020Assignee: Intel CorporationInventors: Chee Lim Nge, Eugene Gorbatov, Zhongsheng Wang, James G. Hermerding, II, Basavaraj B. Astekar, Jenn Chuan Cheng, Chia-Hung Sophia Kuo, Ashwin Umpathy, Tin-Cheung Kung, Yifan Li, Alexander B. Uan-Zo-Li
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Patent number: 10684667Abstract: An apparatus is provided which comprises: a first circuitry to estimate variation of an internal impedance of a battery; a second circuitry to estimate a high power that the battery can supply for a first time-period, based on the estimated variation of the impedance of the battery; and a third circuitry to facilitate operation of one or more components of the apparatus in accordance with the estimated high power for the first time-period.Type: GrantFiled: September 28, 2017Date of Patent: June 16, 2020Assignee: Intel CorporationInventors: Naoki Matsumura, Brian C. Fritz, Andy Keates, Alexander B. Uan-Zo-Li
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Publication number: 20200142463Abstract: In some examples, an apparatus can control power provision to a computing device. A controller is to provide power to the computing device from a first power source at a power level above a sustained power rating of the first power source for a first time period, and is to provide power to the computing device from a second power source at a power level above a sustained power rating of the second power source for a second time period after the first time period.Type: ApplicationFiled: January 8, 2020Publication date: May 7, 2020Applicant: INTEL CORPORATIONInventors: Teal Hand, Alexander B. Uan-Zo-li, Andy Keates
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Publication number: 20190377405Abstract: In some examples, a voltage protection apparatus includes a circuit to compare an input voltage of a processor to a threshold voltage, and to provide a throttle signal to the processor if the input voltage of the processor droops below the threshold voltage. The processor input voltage can then be set to a lower voltage and the processor power can thus be lowered.Type: ApplicationFiled: March 29, 2019Publication date: December 12, 2019Applicant: Intel CorporationInventors: Alexander B. Uan-Zo-li, Eugene Gorbatov, Philip R. Lehwalder, Michael Zelikson, Sameer Shekhar, Nimrod Angel, Jonathan Douglas, Muhammad Abozaed, Alan Hallberg, Douglas Huard, Edward Burton, Merwin Brown
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Patent number: 10496145Abstract: Systems, apparatuses, and methods may include a first power source to output power at a first normal power level and a first peak power level and a second power source cooperating with the first power source to output power at a second normal power level and a second peak power level. A system peak power control unit may monitor workload power requirements and cause the first power source to output the first peak power level at a first time period and cause the second power source to output the second peak power level at a second time period, different from the first time period. The time periods may be contiguous or discontiguous.Type: GrantFiled: August 27, 2015Date of Patent: December 3, 2019Assignee: Intel CorporationInventors: Xiaoguo Liang, Jun Zhang, Xiang Zhou, Hong W. Wong, Alexander B. Uan-Zo-Li
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Patent number: 10468730Abstract: Various embodiments may be generally directed to techniques for using an observed battery stress history to manage operation of a computing system component in a high power performance mode when powered by a battery. Various embodiments include techniques for tracking stresses to a battery. Various embodiments include techniques for comparing the battery stress history to a degradation baseline for the battery. Various embodiments include techniques for developing a degradation baseline for a battery including, for example, a degradation baseline based on expected stress to a battery and/or a degradation baseline based on a battery reliability model. Various embodiments include techniques for determining a battery stress surplus or deficit. Various embodiments include techniques for managing operation of a performance enhancing mode or high power performance mode of a computing system component based on the determined battery stress surplus or deficit.Type: GrantFiled: September 26, 2015Date of Patent: November 5, 2019Assignee: INTEL CORPORATIONInventors: Jorge P. Rodriguez, Alexander B. Uan-Zo-Li, Naoki Matsumura, Andrew Keates, James G. Hermerding, II
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Publication number: 20190305568Abstract: In some examples, a hybrid power boost peak power protection system includes an energy storage, a hybrid power boost charger to charge a battery, and a switch to couple a system load to the energy storage and to decouple the system load from the energy storage.Type: ApplicationFiled: March 30, 2018Publication date: October 3, 2019Applicant: INTEL CORPORATIONInventors: Teal Hand, Alexander B. Uan-Zo-li
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Patent number: 10431976Abstract: A method and apparatus for extending peak power capability of a computing device. In one embodiment, the apparatus comprises: voltage monitoring hardware to monitor voltage being supplied by a battery to a system load; and an energy storage coupled to the voltage monitoring hardware and/or charging scheme to supplement supply of power to the system load when the voltage supplied to the system load by the battery, as monitored by the voltage monitoring hardware, drops below a first threshold voltage level, the first threshold voltage level being above a minimum voltage level associated with the computing system.Type: GrantFiled: March 22, 2017Date of Patent: October 1, 2019Assignee: INTEL CORPORATIONInventors: Alexander B. Uan-Zo-li, Eugene Gorbatov, Chee Lim Nge
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Patent number: 10423202Abstract: One embodiment provides an apparatus. The apparatus includes power control logic and a critical comparator. The power control logic is to determine a critical threshold (TC) based, at least in part, on an available input power value (Pin). The critical comparator is to compare a system power consumption value (Psys) and the critical threshold and to assert a processor critical throttle signal to a processor if the system power consumption value is greater than or equal to the critical threshold.Type: GrantFiled: April 7, 2016Date of Patent: September 24, 2019Assignee: Intel CorporationInventors: Efraim Rotem, Tod F. Schiff, Doron Rajwan, Jeffrey M. Jull, James G. Hermerding, II, Nir Rosenzweig, Maytal Toledano, Alexander B. Uan-Zo-Li