Abstract: A method of processing a power semiconductor device includes: providing a semiconductor body of the power semiconductor device; coupling a mask to the semiconductor body; and subjecting the semiconductor body to an ion implantation such that implantation ions traverse the mask prior to entering the semiconductor body.

Abstract: According to an embodiment of a method described herein, a silicon carbide substrate is provided that includes a plurality of device regions. A front side metallization may be provided at a front side of the silicon carbide substrate. The method may further comprise providing an auxiliary structure at a backside of the silicon carbide substrate. The auxiliary structure includes a plurality of laterally separated metal portions. Each metal portion is in contact with one device region of the plurality of device regions.

Abstract: Crystal lattice vacancies are generated in a pretreated section of a semiconductor layer directly adjoining a process surface. Dopants are implanted at least into the pretreated section. A melt section of the semiconductor layer is heated by irradiating the process surface with a laser beam activating the implanted dopants at least in the melt section.

Abstract: A method for processing a semiconductor wafer is proposed. The method may include reducing a thickness of the semiconductor wafer. A carrier structure is placed on a first side of the semiconductor wafer, e.g. before or after reducing the thickness of the semiconductor wafer. The method further includes providing a support structure on a second side of the semiconductor wafer opposite to the first side, e.g. after reducing the thickness of the semiconductor wafer. Methods for welding a support structure onto a semiconductor wafer are proposed. Further, semiconductor composite structures with support structures welded onto a semiconductor wafer are proposed.

Abstract: A method for processing a silicon carbide wafer includes implanting ions into the silicon carbide wafer to form an absorption layer in the silicon carbide wafer. The absorption coefficient of the absorption layer is at least 100 times the absorption coefficient of silicon carbide material of the silicon carbide wafer outside the absorption layer, for light of a target wavelength. The silicon carbide wafer is split along the absorption layer at least by irradiating the silicon carbide wafer with light of the target wavelength to obtain a silicon carbide device wafer and a remaining silicon carbide wafer.

Abstract: Crystal lattice vacancies are generated in a pretreated section of a semiconductor layer directly adjoining a process surface. Dopants are implanted at least into the pretreated section. A melt section of the semiconductor layer is heated by irradiating the process surface with a laser beam activating the implanted dopants at least in the melt section.

Abstract: A thermoelectric device includes a plurality of first semiconductor mesa structures having a first conductivity type and a plurality of second semiconductor mesa structures having a second conductivity type. First semiconductor mesa structures of the plurality of first semiconductor mesa structures and second semiconductor mesa structures of the plurality of second semiconductor mesa structures are electrically connected in series. The thermoelectric device further includes a glass structure made of at least one of a borosilicate glass, boron-zinc-glass and a low transition temperature glass. The glass structure is arranged laterally between the first semiconductor mesa structures of the plurality of first semiconductor mesa structures and the second semiconductor mesa structures of the plurality of second semiconductor mesa structures.

Abstract: An array of glass members is arranged in a glass substrate includes a plurality of depressions formed in a first main surface of the glass substrate, and a plurality of openings formed in a second main surface of the glass substrate.

Abstract: A semiconductor device includes a common doping region located within a semiconductor substrate of the semiconductor device. The common doping region includes a first portion. A maximal doping concentration within the first portion is higher than 1·1015 cm?3. The common doping region includes a second portion. A minimal doping concentration within the second portion is lower than 50% of the maximal doping concentration within the first portion of the common doping region. The common doping region includes a third portion. A minimal doping concentration within the third portion is more than 30% higher than the minimal doping concentration within the second portion. The second portion of the common doping region is located vertically between the first portion of the common doping region and the third portion of the common doping region.

Abstract: A method of manufacturing a plurality of glass members comprises bringing a first main surface of a glass substrate in contact with a first working surface of a first mold substrate, the first working surface being provided with a plurality of first protruding portions, and bringing a second main surface of the glass substrate in contact with a second working surface of a second mold substrate, the second working surface being provided with a plurality of second protruding portions. The method further comprises controlling a temperature of the glass substrate to a temperature above a glass-transition temperature to form the plurality of glass members, removing the first and the second mold substrates from the glass substrate, and separating adjacent ones of the plurality of glass members.

Abstract: A semiconductor element is formed in a mesa portion of a semiconductor substrate. A cavity is formed in a working surface of the semiconductor substrate. The semiconductor substrate is brought in contact with a glass piece made of a glass material and having a protrusion. The glass piece and the semiconductor substrate are arranged such that the protrusion extends into the cavity. The glass piece is bonded to the semiconductor substrate. The glass piece is in-situ bonded to the semiconductor substrate by pressing the glass piece against the semiconductor substrate. During the pressing a temperature of the glass piece exceeds a glass transition temperature and the temperature and a force exerted on the glass piece are controlled to fluidify the glass material and after re-solidifying the protrusion completely fills the cavity.

Abstract: A method of manufacturing a semiconductor device includes forming a frame trench extending from a first surface into a base substrate, forming, in the frame trench, an edge termination structure comprising a glass structure, forming a conductive layer on the semiconductor substrate and the edge termination structure, and removing a portion of the conductive layer above the edge termination structure. A remnant portion of the conductive layer forms a conductive structure that covers a portion of the edge termination structure directly adjoining a sidewall of the frame trench.

Abstract: A source material, which is based on a glass, is arranged on a working surface of a mold substrate. The mold substrate is made of a single-crystalline material. A cavity is formed in the working surface. The source material is pressed against the mold substrate. During pressing a temperature of the source material and a force exerted on the source material are controlled to fluidify source material. The fluidified source material flows into the cavity. Re-solidified source material forms a glass piece with a protrusion extending into the cavity. After re-solidifying, the glass piece may be bonded to the mold substrate. On the glass piece, protrusions and cavities can be formed with slope angles less than 80 degrees, with different slope angles, with different depths and widths of 10 micrometers and more.

Abstract: A semiconductor device includes a common doping region located within a semiconductor substrate of the semiconductor device. The common doping region includes a first portion. A maximal doping concentration within the first portion is higher than 1·1015 cm?3. The common doping region includes a second portion. A minimal doping concentration within the second portion is lower than 50% of the maximal doping concentration within the first portion of the common doping region. The common doping region includes a third portion. A minimal doping concentration within the third portion is more than 30% higher than the minimal doping concentration within the second portion. The second portion of the common doping region is located vertically between the first portion of the common doping region and the third portion of the common doping region.

Abstract: A lithium ion battery includes a first substrate having a first main surface, and a lid including an insulating material. The lid is attached to the first main surface of the first substrate, and a cavity is defined between the first substrate and the lid. The lithium ion battery further includes an electrical interconnection element in the lid, the electrical interconnection element providing an electrical connection between a first main surface and a second main surface of the lid. The lithium ion battery further includes an electrolyte in the cavity, an anode at the first substrate, the anode including a component made of a semiconductor material, and a cathode at the lid.

Abstract: A method for forming semiconductor devices includes attaching a glass structure to a wide band-gap semiconductor wafer having a plurality of semiconductor devices. The method further includes forming at least one pad structure electrically connected to at least one doping region of a semiconductor substrate of the wide band-gap semiconductor wafer, by forming electrically conductive material within at least one opening extending through the glass structure.

Abstract: Crystal lattice vacancies are generated in a pretreated section of a semiconductor layer directly adjoining a process surface. Dopants are implanted at least into the pretreated section. A melt section of the semiconductor layer is heated by irradiating the process surface with a laser beam activating the implanted dopants at least in the melt section.

Abstract: A method of processing a power semiconductor device includes: providing a semiconductor body of the power semiconductor device; coupling a mask to the semiconductor body; and subjecting the semiconductor body to an ion implantation such that implantation ions traverse the mask prior to entering the semiconductor body.

Abstract: An ion implantation apparatus includes an ion beam directing unit, a substrate support, and a controller. The controller is configured to effect a relative movement between an ion beam passing the ion beam directing unit and the substrate support. A beam track of the ion beam on a substrate mounted on the substrate support includes circles or a spiral.

Abstract: A Magnetic Czochralski semiconductor wafer having opposing first and second sides arranged distant from one another in a first vertical direction is treated by implanting first particles into the semiconductor wafer via the second side to form crystal defects in the semiconductor wafer. The crystal defects have a maximum defect concentration at a first depth. The semiconductor wafer is heated in a first thermal process to form radiation induced donors. Implantation energy and dose are chosen such that the semiconductor wafer has, after the first thermal process, an n-doped semiconductor region arranged between the second side and first depth, and the n-doped semiconductor region has, in the first vertical direction, a local maximum of a net doping concentration between the first depth and second side and a local minimum of the net doping concentration between the first depth and first maximum.