Patents by Inventor Alexander Dribinsky
Alexander Dribinsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170236946Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.Type: ApplicationFiled: January 30, 2017Publication date: August 17, 2017Inventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribinsky, Tae Youn Kim
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Publication number: 20170115329Abstract: A current sensor configured to be employed in an array of current sensors and an array of parallel connected current sensors is disclosed. In one embodiment the current sensors comprise integrated circuit current sensors and a plurality of the current sensors are connected in parallel in a number that is selected to at least accommodate the maximum magnitude of a current to be monitored. When configured in parallel as an array of sensors, at least one of the current sensors of the array of current sensors provides an output signal that represents an average of the currents measured by the plurality of current sensors in the array.Type: ApplicationFiled: October 7, 2016Publication date: April 27, 2017Inventors: George Schuellein, Bin Liu, Alexander Dribinsky
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Patent number: 9608619Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.Type: GrantFiled: July 22, 2013Date of Patent: March 28, 2017Assignee: Peregrine Semiconductor CorporationInventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribinsky, Tae Youn Kim
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Publication number: 20160226478Abstract: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors.Type: ApplicationFiled: January 4, 2016Publication date: August 4, 2016Inventors: Alexander Dribinsky, Tae Youn Kim, Dylan J. Kelly, Christopher N. Brindle
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Patent number: 9397656Abstract: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors.Type: GrantFiled: April 21, 2014Date of Patent: July 19, 2016Assignee: Peregrine Semiconductor CorporationInventors: Alexander Dribinsky, Tae Youn Kim, Dylan J. Kelly, Christopher N. Brindle
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Patent number: 8954902Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.Type: GrantFiled: February 15, 2011Date of Patent: February 10, 2015Assignee: Peregrine Semiconductor CorporationInventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Mark L. Burgener, Alexander Dribinsky, Tae Youn Kim
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Publication number: 20150015321Abstract: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors.Type: ApplicationFiled: April 21, 2014Publication date: January 15, 2015Applicant: PEREGRINE SEMICONDUCTOR CORPORATIONInventors: Alexander Dribinsky, Tae Youn Kim, Dylan J. Kelly, Christopher N. Brindle
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Publication number: 20140372074Abstract: A sensor uses an accelerometer to measure acceleration values in two axes to detect if a tip-over angle of a system has exceeded a tip-over threshold angle ?. Each acceleration value is respectively multiplied by a corresponding factor a, b. The two factors a, b are chosen as a function of the tip-over threshold angle ?. Two values are calculated and each calculated value is compared to zero. Depending upon which values are greater than or less than zero determines whether the tip-over angle has been exceeded. The detector, upon sensing of a tipped-over condition, provides a signal indicative of that condition. The output signal can be employed to trigger an alarm or to shut down a device that has tipped over or to otherwise denote the tipped-over condition.Type: ApplicationFiled: June 4, 2014Publication date: December 18, 2014Inventors: Alexander Dribinsky, Kenichi Katsumoto, Hongzhi Sun, John Newton
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Publication number: 20140167834Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.Type: ApplicationFiled: July 22, 2013Publication date: June 19, 2014Applicant: Peregrine Semiconductor CorporationInventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribinsky, Tae Youn Kim
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Patent number: 8698543Abstract: An interface within an electronic device coupled to a serial communications bus having one or more serial communications lines generates a reference voltage source within the electronic device from the logic signals carried on the serial communications line(s). The generated reference voltage source is used within the electronic device to decode the logic signals received from the serial communications line(s).Type: GrantFiled: February 28, 2013Date of Patent: April 15, 2014Assignee: Memsic, Inc.Inventor: Alexander Dribinsky
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Patent number: 8143935Abstract: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors.Type: GrantFiled: July 26, 2007Date of Patent: March 27, 2012Assignee: Peregrine Semiconductor CorporationInventors: Alexander Dribinsky, Tae Youn Kim, Dylan J. Kelly, Christopher N. Brindle
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Publication number: 20110227637Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.Type: ApplicationFiled: February 15, 2011Publication date: September 22, 2011Inventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Mark L. Burgener, Alexander Dribinsky, Tae Youn Kim
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Patent number: 7890891Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.Type: GrantFiled: September 14, 2006Date of Patent: February 15, 2011Assignee: Peregrine Semiconductor CorporationInventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribinsky, Tae Youn Kim
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Patent number: 7862229Abstract: A system, device, and method for minimizing x-axis and/or y-axis offset shift due to internally produced as well as externally produced on chip temperature imbalances. At least one temperature gradient canceling device is disposed on a substrate including a temperature gradient sensitive device having at least one pair of sensors. Voltage signals generated by the temperature gradient canceling devices can be combined with voltage signals generated by each of the pair of sensors to account for the offset.Type: GrantFiled: August 22, 2008Date of Patent: January 4, 2011Assignee: Memsic, Inc.Inventors: Alexander Dribinsky, Gregory P. Pucci, Yongyao Cai, Mathew Varghese, Gary J. O'Brien
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Patent number: 7671643Abstract: A power-on-reset (POR) circuit having a zero or substantially zero current state while the supply voltage is in a predetermined, valid range is disclosed. The POR circuit includes a state machine, an oscillator, and output circuitry that are electrically coupled to one another and to a supply voltage. Output from the output circuitry is also provided to the integrated circuit to which the POR circuit is coupled. The state machine includes a plurality of sequential circuits such as latches, flip-flops, and the like that are electrically coupled in a cascade, to provide a ripple counter. The output circuitry is structured and arranged to reset or initialize all of the logic elements on the chip by generating a POR output logic HI (1) signal by Boolean operation of the logic circuitry signal of the state machine for all Boolean states except one. The oscillator is disabled when the POR output logic signal is LO (0), which causes the POR circuit to enter a zero or substantially zero current state.Type: GrantFiled: January 3, 2008Date of Patent: March 2, 2010Assignee: Memsic, Inc.Inventors: Alexander Dribinsky, Gregory Pucci
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Publication number: 20100045362Abstract: A system, device, and method for minimizing x-axis and/or y-axis offset shift due to internally produced as well as externally produced on chip temperature imbalances. At least one temperature gradient canceling device is disposed on a substrate including a temperature gradient sensitive device having at least one pair of sensors. Voltage signals generated by the temperature gradient canceling devices can be combined with voltage signals generated by each of the pair of sensors to account for the offset.Type: ApplicationFiled: August 22, 2008Publication date: February 25, 2010Applicant: MEMSIC. INC.Inventors: Alexander Dribinsky, Gregory P. Pucci, Yongyao Cai, Mathew Varghese, Gary J. O'Brien
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Publication number: 20090174444Abstract: A power-on-reset (POR) circuit having a zero or substantially zero current state while the supply voltage is in a predetermined, valid range is disclosed. The POR circuit includes a state machine, an oscillator, and output circuitry that are electrically coupled to one another and to a supply voltage. Output from the output circuitry is also provided to the integrated circuit to which the POR circuit is coupled. The state machine includes a plurality of sequential circuits such as latches, flip-flops, and the like that are electrically coupled in a cascade, to provide a ripple counter. The output circuitry is structured and arranged to reset or initialize all of the logic elements on the chip by generating a POR output logic HI (1) signal by Boolean operation of the logic circuitry signal of the state machine for all Boolean states except one. The oscillator is disabled when the POR output logic signal is LO (0), which causes the POR circuit to enter a zero or substantially zero current state.Type: ApplicationFiled: January 3, 2008Publication date: July 9, 2009Inventors: Alexander Dribinsky, Gregory Pucci
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Publication number: 20080076371Abstract: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors.Type: ApplicationFiled: July 26, 2007Publication date: March 27, 2008Inventors: Alexander Dribinsky, Tae Kim, Dylan Kelly, Christopher Brindle
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Patent number: 7305881Abstract: A thermal accelerometer device that provides a compensation for sensitivity variations over temperature. The thermal accelerometer includes signal conditioning circuitry operative to receive analog signals representing a differential temperature is indicative of a sensed acceleration. The signal conditioning circuitry includes serially connected A-to-D and D-to-A converters, which implement a temperature dependent function and process the received signals to provide a compensation for sensitivity variations over a range of ambient temperature. To provide a ratiometric compensation for variations in power supply voltage, a buffered voltage proportional to the supply voltage is provided as a reference voltage to the D-to-A converter. The thermal accelerometer includes a self-test circuit for verifying the integrity of a heater, temperature sensors, and circuitry included within the device.Type: GrantFiled: June 7, 2005Date of Patent: December 11, 2007Assignee: Memsic, Inc.Inventors: Yang Zhao, Albert Leung, Michael E. Rebeschini, Gregory P. Pucci, Alexander Dribinsky, Yongyao Cai
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Publication number: 20070069291Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.Type: ApplicationFiled: September 14, 2006Publication date: March 29, 2007Inventors: Michael Stuber, Christopher Brindle, Dylan Kelly, Clint Kemerling, George Imthurn, Robert Welstand, Mark Burgener, Alexander Dribinsky, Tae Kim