Patents by Inventor Alexander Dulkin

Alexander Dulkin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11832533
    Abstract: Methods and apparatuses for forming an encapsulation bilayer over a chalcogenide material on a semiconductor substrate are provided. Methods involve forming a bilayer including a barrier layer directly on chalcogenide material deposited using pulsed plasma plasma-enhanced chemical vapor deposition (PP-PECVD) and an encapsulation layer over the barrier layer deposited using plasma-enhanced atomic layer deposition (PEALD). In various embodiments, the barrier layer is formed using a halogen-free silicon precursor and the encapsulation layer deposited by PEALD is formed using a halogen-containing silicon precursor and a hydrogen-free nitrogen-containing reactant.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: November 28, 2023
    Assignee: Lam Research Corporation
    Inventors: James Samuel Sims, Andrew John McKerrow, Meihua Shen, Thorsten Lill, Shane Tang, Kathryn Merced Kelchner, John Hoang, Alexander Dulkin, Danna Qian, Vikrant Rai
  • Publication number: 20220115592
    Abstract: Methods and apparatuses for forming an encapsulation bilayer over a chalcogenide material on a semiconductor substrate are provided. Methods involve forming a bilayer including a barrier layer directly on chalcogenide material deposited using pulsed plasma plasma-enhanced chemical vapor deposition (PP-PECVD) and an encapsulation layer over the barrier layer deposited using plasma-enhanced atomic layer deposition (PEALD). In various embodiments, the barrier layer is formed using a halogen-free silicon precursor and the encapsulation layer deposited by PEALD is formed using a halogen-containing silicon precursor and a hydrogen-free nitrogen-containing reactant.
    Type: Application
    Filed: December 20, 2021
    Publication date: April 14, 2022
    Inventors: James Samuel Sims, Andrew John McKerrow, Meihua Shen, Thorsten Lill, Shane Tang, Kathryn Merced Kelchner, John Hoang, Alexander Dulkin, Danna Qian, Vikrant Rai
  • Patent number: 11239420
    Abstract: Methods and apparatuses for forming an encapsulation bilayer over a chalcogenide material on a semiconductor substrate are provided. Methods involve forming a bilayer including a barrier layer directly on chalcogenide material deposited using pulsed plasma plasma-enhanced chemical vapor deposition (PP-PECVD) and an encapsulation layer over the barrier layer deposited using plasma-enhanced atomic layer deposition (PEALD). In various embodiments, the barrier layer is formed using a halogen-free silicon precursor and the encapsulation layer deposited by PEALD is formed using a halogen-containing silicon precursor and a hydrogen-free nitrogen-containing reactant.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: February 1, 2022
    Assignee: Lam Research Corporation
    Inventors: James Samuel Sims, Andrew John McKerrow, Meihua Shen, Thorsten Lill, Shane Tang, Kathryn Merced Kelchner, John Hoang, Alexander Dulkin, Danna Qian, Vikrant Rai
  • Publication number: 20200066987
    Abstract: Methods and apparatuses for forming an encapsulation bilayer over a chalcogenide material on a semiconductor substrate are provided. Methods involve forming a bilayer including a barrier layer directly on chalcogenide material deposited using pulsed plasma plasma-enhanced chemical vapor deposition (PP-PECVD) and an encapsulation layer over the barrier layer deposited using plasma-enhanced atomic layer deposition (PEALD). In various embodiments, the barrier layer is formed using a halogen-free silicon precursor and the encapsulation layer deposited by PEALD is formed using a halogen-containing silicon precursor and a hydrogen-free nitrogen-containing reactant.
    Type: Application
    Filed: August 24, 2018
    Publication date: February 27, 2020
    Inventors: James Samuel Sims, Andrew John McKerrow, Meihua Shen, Thorsten Lill, Shane Tang, Kathryn Merced Kelchner, John Hoang, Alexander Dulkin, Danna Qian, Vikrant Rai
  • Patent number: 10153282
    Abstract: An apparatus for transporting or storing at least one semiconductor wafer in an ultra-high vacuum is provided. A portable vacuum transfer pod is provided comprising an internal wafer storage chamber for storing one or more wafers and a wafer support for supporting at least one wafer within the internal wafer storage chamber. A passively capable vacuum pump capable of passive vacuum pumping is in fluid connection with the internal wafer storage chamber and is mechanically connected to the portable vacuum transfer pod. A shut off valve for opening and closing the fluid connection is between the passively capable vacuum pump and the internal wafer storage chamber.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: December 11, 2018
    Assignee: Lam Research Corporation
    Inventors: Theodoros Panagopoulos, Richard Gould, Edmundo Reyes, John Boniface, Ivan Berry, Alexander Dulkin, Bart van Schravendijk
  • Patent number: 8449731
    Abstract: Local plasma density, e.g., the plasma density in the vicinity of the substrate, is increased by providing an ion extractor configured to transfer ions and electrons from a first region of magnetically confined plasma (typically a region of higher density plasma) to a second region of plasma (typically a region of lower density plasma). The second region of plasma is preferably also magnetically shaped or confined and resides between the first region of plasma and the substrate. A positively biased conductive member positioned proximate the second region of plasma serves as an ion extractor. A positive bias of about 50-300 V is applied to the ion extractor causing electrons and subsequently ions to be transferred from the first region of plasma to the vicinity of the substrate, thereby forming higher density plasma. Provided methods and apparatus are used for deposition and resputtering.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: May 28, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Anshu A. Pradhan, Douglas B. Hayden, Ronald L. Kinder, Alexander Dulkin
  • Patent number: 8343318
    Abstract: A physical vapor deposition (PVD) system includes a chamber and a plurality of electromagnetic coils arranged around the chamber. First and second annular bands of permanent magnets are arranged around the chamber with poles oriented perpendicular to a magnetic field imposed by the electromagnetic coils. Each of the permanent magnets in the first annular band is arranged with poles having a first polarity closest to a central axis of the chamber. Each of the permanent magnets in the second annular band is arranged anti-parallel with respect to the permanent magnets in the first annular band.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: January 1, 2013
    Assignee: Novellus Systems Inc.
    Inventors: Karl Leeser, Ishtak Karim, Alexander Dulkin
  • Publication number: 20110233050
    Abstract: A physical vapor deposition (PVD) system includes a chamber and a plurality of electromagnetic coils arranged around the chamber. First and second annular bands of permanent magnets are arranged around the chamber with poles oriented perpendicular to a magnetic field imposed by the electromagnetic coils. Each of the permanent magnets in the first annular band is arranged with poles having a first polarity closest to a central axis of the chamber. Each of the permanent magnets in the second annular band is arranged anti-parallel with respect to the permanent magnets in the first annular band.
    Type: Application
    Filed: March 25, 2010
    Publication date: September 29, 2011
    Inventors: Karl Leeser, Ishtak Karim, Alexander Dulkin
  • Patent number: 7964504
    Abstract: Recessed features on a Damascene substrate are filled with metal using plasma PVD. Recessed features having widths of less than about 300 nm, e.g., between about 30-300 nm can be filled with metals (e.g., copper and aluminum), without forming voids. In one approach, the deposition is performed by exposing the substrate to a high-density plasma characterized by high fractional ionization of metal. Under these conditions, the metal is deposited within the recess, without forming large overhang at the opening of the recess. In some embodiments, the metal is deposited within the recess, while diffusion barrier material is simultaneously etched from the field region. In a second approach, recessed features are filled by performing a plurality of profiling cycles, wherein each cycle includes a net etching and a net depositing operation. Etching and depositing parameters are adjusted such that the recessed features are filled without forming overhangs and voids.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: June 21, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Roey Shaviv, Alexander Dulkin, Daniel Juliano, Ronald Kinder
  • Patent number: 7922880
    Abstract: Local plasma density, e.g., the plasma density in the vicinity of the substrate, is increased by providing an ion extractor configured to transfer ions and electrons from a first region of magnetically confined plasma (typically a region of higher density plasma) to a second region of plasma (typically a region of lower density plasma). The second region of plasma is preferably also magnetically shaped or confined and resides between the first region of plasma and the substrate. A positively biased conductive member positioned proximate the second region of plasma serves as an ion extractor. A positive bias of about 50-300 V is applied to the ion extractor causing electrons and subsequently ions to be transferred from the first region of plasma to the vicinity of the substrate, thereby forming higher density plasma. Provided methods and apparatus are used for deposition and resputtering.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: April 12, 2011
    Assignee: Novellus Systems, Inc.
    Inventors: Anshu A. Pradhan, Douglas B. Hayden, Ronald L. Kinder, Alexander Dulkin
  • Patent number: 7855147
    Abstract: Copper seed layers are formed on diffusion barrier layers (e.g., on Ta, and TaNx layers) without significant agglomeration of copper, with the use of an engineered barrier layer/seed layer interface. The engineered interface includes an adhesion layer, in which copper atoms are physically trapped and are prevented from migrating and agglomerating. The adhesion layer can include between about 20-80% atomic of copper. The copper atoms of the adhesion layer are exposed during deposition of a copper seed layer and serve as the nucleation sites for the deposited copper. Thin, continuous, and conformal seed layers can be deposited on top of the adhesion layer. The trapping of copper within the adhesion layer is achieved by intermixing diffusion barrier and seed layer materials using PVD and/or ALD.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: December 21, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Alexander Dulkin, Asit Rairkar, Frank Greer, Anshu A. Pradhan, Robert Rozbicki
  • Patent number: 7745332
    Abstract: Recessed features on a Damascene substrate are filled with metal using plasma PVD. Recessed features having widths of less than about 300 nm, e.g., between about 30-300 nm can be filled with metals (e.g., copper and aluminum), without forming voids. In one approach, the deposition is performed by exposing the substrate to a high-density plasma characterized by high fractional ionization of metal. Under these conditions, the metal is deposited within the recess, without forming large overhang at the opening of the recess. In some embodiments, the metal is deposited within the recess, while diffusion barrier material is simultaneously etched from the field region. In a second approach, recessed features are filled by performing a plurality of profiling cycles, wherein each cycle includes a net etching and a net depositing operation. Etching and depositing parameters are adjusted such that the recessed features are filled without forming overhangs and voids.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: June 29, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Roey Shaviv, Alexander Dulkin, Neil Mackie, Daniel Juliano, Robert Rozbicki
  • Patent number: 7645696
    Abstract: Methods of depositing thin seed layers that improve continuity of the seed layer as well as adhesion to the barrier layer are provided. According to various embodiments, the methods involve performing an etchback operation in the seed deposition chamber prior to depositing the seed layer. The etch step removes barrier layer overhang and/or oxide that has formed on the barrier layer. It some embodiments, a small deposition flux of seed atoms accompanies the sputter etch flux of argon ions, embedding metal atoms into the barrier layer. The embedded metal atoms create nucleation sites for subsequent seed layer deposition, thereby promoting continuous seed layer film growth, film stability and improved seed layer-barrier layer adhesion.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: January 12, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Alexander Dulkin, Anil Vijayendran, Tom Yu, Daniel R. Juliano
  • Patent number: 6566246
    Abstract: The present invention pertains to systems and methods for improving the deposition of conformal copper seed layers in integrated circuit metalization. The invention involves controlling the morphology of the barrier layer deposited underneath the copper seed layer. The barrier layer can be composed of TaN and Ta, or TaN alone. It can also be composed of TiN or TiNSi. The process conditions of the barrier layer deposition are carried out in a manner that results in a highly or completely amorphous crystalline structure. Such a barrier layer allows for conformal deposition of the copper seed layer on top of the barrier layer that is less susceptible to agglomeration.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: May 20, 2003
    Assignee: Novellus Systems, Inc.
    Inventors: Tarek Suwwan de Felipe, Michal Danek, Erich Klawuhn, Alexander Dulkin