Abstract: A vent valve for a buoyancy control device suitable for divers, where the valve may be opened by any combination of over-pressure, manual pressure relief or a powered means, where a force to a valve plug is applied by means of a spring that is constrained to prevent entirely lateral and angular movement but in which movement of the plug in the axis of the seat is unconstrained.

Abstract: An improvement in the security of a logic system by minimizing observable features such as the power supply or electromagnetic radiation, so called, “side-channel attacks”. Specifically, the present invention comprises a technique and methods for reducing the ability of an intruder to monitor the relationship between currents in the system and the data in the system through the use of a randomized clock wherein the clock eye diagram is closed and without significant reduction in maximum operating speed compared to the reduction in maximum operating frequency that occurs when using conventional means of additive jitter. A system where the clock eye diagram is completely closed is provably more secure than systems where the clock eye diagram is partially open.

Abstract: A technique and method for improving the security of the usage of a key in devices or systems with modes of operation that must be secured whereby the key has multiple fields with timing information that must be matched to transitions of a randomly generated clock, the randomly generated clock derived from a fixed frequency clock, whereby tampering of the fixed frequency clock will result in detection of the security attack and exit from the secure mode of operation.

Abstract: An improvement in the security of a logic system from attacks that observable features such as the power supply or electromagnetic radiation, so called, “side-channel attacks”. Specifically, the present invention comprises a technique and method for reducing ability to monitor the relationship between currents in the system and the data in the system by closing the overall clock eye diagram, whilst keeping the eye diagram for connected stages open. The degree of eye closure for connected pipeline stages allows the system to run closer to its maximum operating speed compared to the use of system wide clock jitter, yet the overall closure provides security that is absent from systems with a partially open eye.

Abstract: An improvement in the security of a logic system by minimising observable features such as the power supply or electromagnetic radiation, so called, “side-channel attacks”. Specifically, the present invention comprises a technique and methods for reducing the ability of an intruder to monitor the relationship between currents in the system and the data in the system through the use of a randomised clock wherein the clock eye diagram is closed and without significant reduction in maximum operating speed compared to the reduction in maximum operating frequency that occurs when using conventional means of additive jitter. A system where the clock eye diagram is completely closed is provably more secure than systems where the clock eye diagram is partially open.

Abstract: A technique and method for creating a provably secure communications channel between two devices making the observation, recovery and modification of the data within the communications channel difficult. Specifically, the present invention compromises a technique and method for protecting the data within a data channel where security must be assured.

Abstract: An improvement in the security of a logic system from attacks that observable features such as the power supply or electromagnetic radiation, so called, “side-channel attacks”. Specifically, the present invention comprises a technique and method for reducing ability to monitor the relationship between currents in the system and the data in the system by closing the overall clock eye diagram, whilst keeping the eye diagram for connected stages open. The degree of eye closure for connected pipeline stages allows the system to run closer to its maximum operating speed compared to the use of system wide clock jitter, yet the overall closure provides security that is absent from systems with a partially open eye.

Abstract: Bidirectional differential point to point simultaneous high speed signalling is provided between integrated circuits with highly effective echo canceling. Each integrated circuit comprises a transmitter for transmitting a first signal to another integrated circuit and a receiver for receiving a second signal from the other integrated circuit. The transmitter has an output buffer; a receiver has a receiver buffer and is co-located on the same integrated circuit; and a differential buffer is coupled between the input of the transmitter buffer and the output of the receiver buffer. To increase the quality of receiving the second signal, a third signal adjusted in phase and amplitude is coupled at the output of the receive buffer, so that the echoing of the first signal is canceled. Preferably, the rise time of the third signal is also adjusted.

Abstract: A device that indicates a hypoxia risk or hyperoxia risk, or analogue thereto, using an integral value that is reset when a user activates a switch and which integrates over time from each reset event as a function calculating the PPO2 deviation from parameters that include ambient pressure changes or derivatives thereof and physiological parameters or analogues thereof, from which a metabolic parameter is calculated.

Abstract: An electrical heater element containing one or more sense wires located at a point or points between the power terminals that provides a voltage signal that is compared with a predefined level or ratio, to trigger a power supply trip should the sense voltage fall outside those limits.

Abstract: A device that combines the function of a rebreather bail out valve and loop volume valve (also known as an Automatic Diluent Valve), using a single pressure or flow regulator, with preferred embodiments providing a bipolar or tripolar action. The device can provide an automatic loop shut off capability.

Abstract: A rebreather safety monitoring device comprising a carbon dioxide sensor provided with a gas sampler adapted for sampling a gas in a rebreather breathing loop from a location between an inhale one-way valve on a rebreather mouthpiece and a carbon dioxide scrubber and providing the obtained gas sample to the carbon dioxide sensor, and a means to provide alarms or warnings based on the level of the expired carbon dioxide. The present invention detects a wide range of failures of a rebreather by measurement of the expired carbon dioxide level and application of that level to trigger alarms, provide loop shut-off or provide safety warnings.

Abstract: A reference voltage generator and a method for generating a reference voltage for a logic device using the reference voltage generator is provided. The voltage reference generator includes a ring oscillator having a plurality of logic gates and a phase/frequency detector. A first reference voltage is generated on the basis of a phase/frequency difference between the phase/frequency of a reference clock and the phase/frequency of the ring oscillator. A second reference voltage is generated on the basis of a voltage swing of the oscillator circuit. Both reference voltages can be applied to the plurality of logic gates of the ring oscillator such that a constant delay is created through each logic gate of the logic device.

Abstract: A data transmission apparatus and method employing the phase noise characteristics within the receiving registers to measure and control the characteristics of the channel as a function of the data pattern and to compensate for production tolerances within the channel by altering the timing characteristics of the signal at either the transmitter or receiver as a function of the data. Time offsets between different signals that form the communication channel are measured for different frequencies and/or for different data patterns transmitted through the channel and stored to compensate for an inter-signal skew by performing relative alignment of the measured offsets to a main clock edge.

Abstract: An amplifier circuit for receiving an input signal and providing an output signal, comprises a main chain of logic stages with a plurality of nodes therebetween, and at least one auxiliary chain nested between one node in the main chain and another node, which is not the next node, to form a series of feed back or feed forward nested equalisation loops; whereby the input signal is fed serially down the main chain and is also fed through the said at least one auxiliary chain and summed to provide the output signal. The invention overcomes gain-bandwidth limits of the drive stages and bandwidth reductions that occur when analogue stages operating in a linear mode are concatenated.

Abstract: The present invention relates to high speed communications, in particular, to an interface device between a transmitting device and a receiving device of a transmission system, wherein the transmitting device is capable of automatic compensation of cross-talk timing errors in the interface device, for a group of signals, by using information stored in a storage attached to that interface device. Preferably, the data stored in said storage comprises data on interconnections between said first and second plurality of terminals and data on crosstalk timing errors in said transmission lines relating to a specific data pattern, for each of said stored interconnection.

Abstract: A means for reducing the power consumption of the transmitter by storing the recent history of the transmitted data using a string of gates with taps from the string taken at points determined by the propagation delay of each gate and controlling driving transistors as a function of comparison of that history with input data so that, either the signal is driven into the transmission line at full strength, or at a level near the minimum needed to retain the state in the receiver. The advantage of the invention is that the line capacitance decays through the terminating resistors or discharge transistors, such that when the next state change is needed, then line has less stored energy needing to be discharged.

Abstract: The present invention relates to the reduction of artifacts introduced by sending data at a higher rate than the bandwidth of the communication channel, such as the voltage and current offsets introduced in the data at the receiver as a function of the preceding data.

Abstract: The present invention relates in general to the field of generation of precise electrical signals, in particular, to a technique for providing accurate delays of signals using a controllable delay line, and is applicable to the areas of high speed communication and memory testing equipment. According to the present invention, an auxiliary reference channel having a delay line which is identical to the main delay line is incorporated into vernier silicon die to allow automatic adjustment of the delay in the main delay line using a reference periodical signal applied to the auxiliary delay line.

Abstract: A timing control device and method for minimizing timing uncertainties due to skew and jitter, wherein a device for the compensation of timing errors in multiple channel electronic devices comprises at least one register having a plurality of channels comprising: a clock for providing a clock signal; a reference signal generator for generating reference signals for deskewing the registers. For each register, a corresponding feedback loop is associated for the relative alignment of the register's timing. The feedback loop comprises a device for detecting a deviation from a predetermined level of probability of reading by the register of a desired symbol on a boundary of two reference channel symbols in a sequence, and a set of delay devices which use the detected values of probability to generate a feedback signal.