Abstract: Process flow for a stacked power diode and design of the resulting diode is disclosed. Blanket epitaxy over heavy doped wafers is performed. By controlling dopant addition during epitaxy, desired n-type, diode base, and p-type doping profiles and thicknesses achieved. V-groove pattern if formed on wafers by depositing mask film, lithography and anisotropic etch. Islands surrounded by V-grooves define individual diodes. V-grooves serve as side insulation. Next, oxidation step passivates V-grooves. Further, the mask film is stripped to open diode contact areas on both sides of wafers. Next high melting point metal and low melting point metal films are selectively electroplated on all open silicon surfaces. Stacking is performed on wafer level by bonding of desired wafer count by solid-liquid interdiffusion process. Wafer stacks are sawed into individual stacked diode dies along outer slopes of V-grooves. Final stacked devices can be used as DSRD—drift step recovery diodes.

Abstract: A direct wafer bonding process for joining GaN and silicon substrates involves pre-treating each of the wafers in an ammonia plasma in order to render the respective contact surfaces ammophilic. The GaN substrate and the silicon substrate may each comprise single crystal wafers. The resulting hybrid semiconductor structure can be used to form high quality, low cost LEDs.

Abstract: A semiconductor-on-glass substrate having a relatively stiff (e.g. relatively high Young's modulus of 125 or higher) stiffening layer or layers placed between the silicon film and the glass in order to eliminate the canyons and pin holes that otherwise form in the surface of the transferred silicon film during the ion implantation thin film transfer process. The new stiffening layer may be formed of a material, such as silicon nitride, that also serves as an efficient barrier against penetration of sodium and other harmful impurities from the glass substrate into the silicon film.

Abstract: Methods include providing a glass, wherein the glass is capable of being phase separated; phase separating the glass; leaching at least one surface of the glass to form a leached glass surface layer; and replenishing the leached glass surface layer with constituents to form a replenished glass surface layer, wherein the constituents cause swelling of the replenished glass surface layer.

Abstract: A semiconductor-on-glass substrate having a relatively stiff (e.g. relatively high Young's modulus of 125 or higher) stiffening layer or layers placed between the silicon film and the glass in order to eliminate the canyons and pin holes that otherwise form in the surface of the transferred silicon film during the ion implantation thin film transfer process. The new stiffening layer may be formed of a material, such as silicon nitride, that also serves as an efficient barrier against penetration of sodium and other harmful impurities from the glass substrate into the silicon film.

Abstract: A direct wafer bonding process for joining GaN and silicon substrates involves pre-treating each of the wafers in an ammonia plasma in order to render the respective contact surfaces ammophilic. The GaN substrate and the silicon substrate may each comprise single crystal wafers. The resulting hybrid semiconductor structure can be used to form high quality, low cost LEDs.

Abstract: Process for forming a fragile layer inside of a single crystalline substrate near one of the substrate surfaces. The fragile layer contains hydrogen mostly in form of hydrogen platelets oriented in parallel to each other and to neighboring crystal surface. The fragile layer is preferably grown within a single crystalline silicon wafer to facilitate the detachment of an overlaying thin layer of single crystalline silicon from the initial wafer. The hydrogen layer is grown on a seed layer. The seed layer is preferably formed by ion implantation of inert gases at doses in 1015 cm?2 range. The hydrogen layer is grown by plasma hydrogenation of the substrate. The hydrogenation process begins at substrate temperature not exceeding 250° C., and than continues at higher temperature not exceeding 400° C.

Abstract: The invention provides a method of making silicon-on-insulator SOI substrates with nitride buried insulator layer by implantation of molecular deuterated ammonia ions ND3+, instead of implanting nitrogen ions (N+, or N2+) as is done in prior art nitride SOI processes. The resultant structure, after annealing, has a buried insulator with a defect density which is substantially lower than in prior art nitride SOI. The deuterated nitride SOI substrates allow much better heat dissipation than SOI with a silicon dioxide buried insulator. These substrates can be used for manufacturing of high speed and high power dissipation monolithic integrated circuits.

Abstract: A technique for forming a film of crystalline material, preferably silicon. The technique creates a sandwich structure with a weakened region at a selected depth underneath the surface. The weakened region is a layer of porous silicon with high porosity. The high porosity enclosed layer is formed by (1) forming a porous silicon layer with low porosity on surface of the substrate, (2) epitaxial growth of a non-porous layer over the low-porous layer (3) increasing of porosity of the low-porous layer making the said layer hi-porous, (4) cleaving the semiconductor substrate at said high porous layer. The porosity of the buried low-porous layer is increased by hydrogenation techniques, for example, by processing in hydrogen plasma. The process is preferentially used to produce silicon-on-insulator wafers.

Abstract: A process for producing a multilayered substrate. In a first step, an adhesive layer is applied to a surface of a support substrate. Then a device substrate is placed into contact with the adhesive surface. Then the adhesive is cured. Then the device substrate is thinned. The device substrate has a hydrogen trap layer inside. The trap layer is formed by ion implantation through a face surface of the device substrate. The adhesive is chosen from compounds that release hydrogen upon curing. Thinning of the device substrate is performed by cleavage along a fragile layer of hydrogen microbubbles. The microbubble layer is formed through gettering of hydrogen released from the adhesive layer upon curing onto the trap layer and evolving the trapped hydrogen into the microbubbles. The substrates are preferably silicon single crystalline wafers and the adhesive is preferably hydrogen-silsesquioxane.

Abstract: A method for fabricating MEMS wherein a structural member is released without using a sacrificial layer. In one embodiment, the method comprises forming a buried hydrogen-rich layer in a semiconductor substrate, defining a release structure in the semiconductor substrate above the buried hydrogen-rich layer, and separating at least a portion of the release structure from the semiconductor substrate by cleaving the semiconductor substrate at the buried hydrogen-rich layer. The method can be used to fabricate hybrid devices wherein a MEMS device and a semiconductor device are formed on the same chip.