Patents by Inventor Alexandre E. Andreev

Alexandre E. Andreev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7788563
    Abstract: The present invention concerns an apparatus including a modular memory and an address locator circuit. The modular memory may be configured to generate a current address signal, a first data output signal and a second data output signal in response to a first port address signal, a second port address signal, an initial state parameter, a target state parameter, a first port enable signal, a second port enable signal, a write enable signal, a data input signal, a first location signal and a second location signal. The address locator circuit may be configured to generate the first location signal and the second location signal in response to the first port address signal, the second port address signal and the current address signal.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: August 31, 2010
    Assignee: LSI Corporation
    Inventors: Alexandre E. Andreev, Anatoli A. Bolotov, Ranko Scepanovic
  • Publication number: 20090316507
    Abstract: The present invention concerns an apparatus including a modular memory and an address locator circuit. The modular memory may be configured to generate a current address signal, a first data output signal and a second data output signal in response to a first port address signal, a second port address signal, an initial state parameter, a target state parameter, a first port enable signal, a second port enable signal, a write enable signal, a data input signal, a first location signal and a second location signal. The address locator circuit may be configured to generate the first location signal and the second location signal in response to the first port address signal, the second port address signal and the current address signal.
    Type: Application
    Filed: June 20, 2008
    Publication date: December 24, 2009
    Inventors: Alexandre E. Andreev, Anatoli A. Bolotov, Ranko Scepanovic
  • Patent number: 6845495
    Abstract: The present invention is directed to a system and method for providing multidirectional routing. The present invention may provide an arbitrary number of routing layers and an arbitrary direction on each of those layers to provide a smaller die size and to reduce power consumption by providing more flexibility for net routing directions.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: January 18, 2005
    Assignee: LSI Logic Corporation
    Inventors: Alexandre E. Andreev, Elyar E. Gasanov, Ranko Scepanovic
  • Publication number: 20040221247
    Abstract: The present invention is directed to a method for generating a tech-library for a logic function. A logic function has many representations. For each representation, a circuit for realizing the representation is decomposed into a combination of instances. An instance is a component logic circuit of a general logic circuit. There are pre-created tech-libraries for the instances. For example, a pre-created tech-library is created by categorizing tech-descriptions for primitive physical circuits based on a negation index. Thus, tech-descriptions for a circuit for realizing a representation are calculated from a combination of elements of the pre-created tech-libraries. Each calculated tech-description is compared with each existing element of a tech-library for the logic function. When a calculated tech-description has at least one marked parameter better or smaller than that of all existing elements of the tech-library for the logic function, the calculated tech-description is added to the tech-library.
    Type: Application
    Filed: April 30, 2003
    Publication date: November 4, 2004
    Inventors: Alexandre E. Andreev, Igor A. Vikhliantsev, Anatoli A. Bolotov
  • Patent number: 6757881
    Abstract: The present invention is directed to power routing with obstacles. A method for determining strap location for power routing in an integrated circuit may include receiving input parameters, the input parameters including a number N indicating a number of straps to be located, wherein a strap of the number of straps is denoted as i. An initial strap placement is found for 1 through N straps and strap placement is calculated by relocating a strap if an obstacle is encountered in an initial strap placement, the relocated strap utilized to relocate at least one other strap of the 1 through N straps. Strap placement may be calculated by employing a local gradient method, dynamic programming, and like methods as contemplated by a person of ordinary skill in the art without departing from the spirit and scope thereof.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: June 29, 2004
    Assignee: LSI Logic Corporation
    Inventors: Alexandre E. Andreev, Lav D. Ivanovic, Ivan Pavisic
  • Publication number: 20030145302
    Abstract: The present invention is directed to power routing with obstacles. A method for determining strap location for power routing in an integrated circuit may include receiving input parameters, the input parameters including a number N indicating a number of straps to be located, wherein a strap of the number of straps is denoted as i. An initial strap placement is found for 1 through N straps and strap placement is calculated by relocating a strap if an obstacle is encountered in an initial strap placement, the relocated strap utilized to relocate at least one other strap of the 1 through N straps. Strap placement may be calculated by employing a local gradient method, dynamic programming, and like methods as contemplated by a person of ordinary skill in the art without departing from the spirit and scope thereof.
    Type: Application
    Filed: January 29, 2002
    Publication date: July 31, 2003
    Inventors: Alexandre E. Andreev, Lav D. Ivanovic, Ivan Pavisic
  • Publication number: 20030121017
    Abstract: The present invention is directed to a system and method for providing multidirectional routing. The present invention may provide an arbitrary number of routing layers and an arbitrary direction on each of those layers to provide a smaller die size and to reduce power consumption by providing more flexibility for net routing directions.
    Type: Application
    Filed: December 20, 2001
    Publication date: June 26, 2003
    Inventors: Alexandre E. Andreev, Elyar E. Gasanov, Ranko Scepanovic