Abstract: A video coding system including an acceleration device including input circuitry configured, for each of a first plurality of video frames to be encoded, to receive an input including at least one raw video frame and at least one reference frame, and to divide each of the first plurality of video frames to be encoded into a second plurality of blocks, and similarity computation circuitry configured, for each one of the first plurality of video frame to be encoded: for each the block of the second plurality of blocks, to produce an intra-prediction hint and an intra-prediction direction. Related apparatus and methods are also provided.

Abstract: There are provided computerized systems and methods of pre-processing video information for optimized video encoding. In various aspects, the pre-processing can be performed in different ways. By way of example, this can be performed by aligning a plurality of consecutive frames in the sequence of video frames. By way of another example, this can be performed by conducting adaptive pre-filtering of the video information. By way of yet another example, this can be performed by filtering the video information in order to remove grain content thereof.

Abstract: There are provided computerized systems and methods of pre-processing video information for optimized video encoding. In various aspects, the pre-processing can be performed in different ways. By way of example, this can be performed by aligning a plurality of consecutive frames in the sequence of video frames. By way of another example, this can be performed by conducting adaptive pre-filtering of the video information. By way of yet another example, this can be performed by filtering the video information in order to remove grain content thereof.

Abstract: Simplified selection of optimal intra prediction in block-based video coding based on texture gradient distribution and minimal activity direction. The minimal activity direction is defined by a vector (?(B, W), ?(B, W)) indicating minimal variation of a discrete function P(x, y) inside a spatial aria of block B with weights W.

Abstract: In video coding, selecting an optimal intra block size based on minimal activity directions and strengths. The method is directed to simplifying the procedure of choosing the best subdivision of a texture block into intra blocks.

Abstract: Selection of an optimal directional intra prediction mode for block-based video coding from a reduced number of intra predictions, including a plurality of angular intra predictions, a planar prediction mode, and DC prediction mode, by performing a logarithmic search inside a set of intra prediction directions.

Abstract: Method for multi-level motion estimation in block-based video coding. The method is targeted to HEVC specifications of video compression, however, may be used with other video coding standards.

Abstract: In video coding, selecting an optimal intra block size based on minimal activity directions and strengths. The method is directed to simplifying the procedure of choosing the best subdivision of a texture block into intra blocks.

Abstract: Selection of an optimal directional intra prediction mode for block-based video coding from a reduced number of intra predictions, including a plurality of angular intra predictions, a planar prediction mode, and DC prediction mode, by performing a logarithmic search inside a set of intra prediction directions.

Abstract: Encoding methods directed to making coding decisions and estimating coding parameters including searching for optimal angular prediction in intra-prediction mode; choosing the best intra block subdivision; and providing motion estimation for tree-structured inter coding. The methods are targeted to HEVC specifications of video compression, however, may be used with other video coding standards.

Abstract: Method for multi-level motion estimation in block-based video coding. The method is targeted to HEVC specifications of video compression, however, may be used with other video coding standards.

Abstract: A video codec having a modular structure for encoding/decoding a digitized sequence of video frames in a multi-core system is described. The video codec comprises a memory unit; a multithreading engine. and a plurality of control and task modules organized in a tree structure, each module corresponding to a coding operation. The modules communicate with each other by control messages and shared memory. The control modules control all coding logic and workflow, and lower level task modules perform tasks and provide calculations upon receiving messages from the control task modules. The multithreading engine maintains context of each task and assigns at least one core to each task for execution. The method of coding/decoding comprises an error resilient algorithm.

Abstract: The video sequence encoding system with high compression efficiency is based on the H.264/AVC international video coding standard and is implementing proposed algorithms for: macroblock motion estimation; simplified rate-distortion optimization for transform size decision-making; acceleration of optimal macroblock type decision; modulation of quantization parameter with look-ahead refinement; and film-grain parameters calculation. The video encoding system comprises a motion estimation unit based on a measurement function for motion search of the matching texture block; a macroblock decision making unit; a pipeline processing module configured to accelerate complex transform; and a quantization parameter modulator configured to enhance the picture quality.

Abstract: Encoding methods directed to making coding decisions and estimating coding parameters including searching for optimal angular prediction in intra-prediction mode; choosing the best intra block subdivision; and providing motion estimation for tree-structured inter coding. The methods are targeted to HEVC specifications of video compression, however, may be used with other video coding standards.

Abstract: A video codec having a modular structure for encoding/decoding a digitized sequence of video frames in a multi-core system is described. The video codec comprises a memory unit; a multithreading engine. and a plurality of control and task modules organized in a tree structure, each module corresponding to a coding operation. The modules communicate with each other by control messages and shared memory. The control modules control all coding logic and workflow, and lower level task modules perform tasks and provide calculations upon receiving messages from the control task modules. The multithreading engine maintains context of each task and assigns at least one core to each task for execution. The method of coding/decoding comprises an error resilient algorithm.

Abstract: A video codec having a modular structure for encoding/decoding a digitized sequence of video frames in a multi-core system is described. The video codec comprises a memory unit; a multithreading engine. and a plurality of control and task modules organized in a tree structure, each module corresponding to a coding operation. The modules communicate with each other by control messages and shared memory. The control modules control all coding logic and workflow, and lower level task modules perform tasks and provide calculations upon receiving messages from the control task modules. The multithreading engine maintains context of each task and assigns at least one core to each task for execution. The method of coding/decoding comprises an error resilient algorithm.

Abstract: A video codec having a modular structure for encoding/decoding a digitized sequence of video frames in a multi-core system is described. The video codec comprises a memory unit; a multithreading engine. and a plurality of control and task modules organized in a tree structure, each module corresponding to a coding operation. The modules communicate with each other by control messages and shared memory. The control modules control all coding logic and workflow, and lower level task modules perform tasks and provide calculations upon receiving messages from the control task modules. The multithreading engine maintains context of each task and assigns at least one core to each task for execution. The method of coding/decoding comprises denoising, core motion estimation, distributed motion estimation, weighted texture prediction and error resilient decoding.

Abstract: The video sequence encoding system with high compression efficiency is based on the H.264/AVC international video coding standard and is implementing proposed algorithms for: macroblock motion estimation; simplified rate-distortion oprimization for transform size decision-making; acceleration of optimal macroblock type decision; modulation of quantization parameter with look-ahead refinement; and film-grain parameters calculation. The video encoding system comprises a motion estimation unit based on a measurement function for motion search of the matching texture block; a macroblock decision making unit; a pipeline processing module configured to accelerate complex transform; and a quantization parameter modulator configured to enhance the picture quality.

Abstract: A video codec having a modular structure for encoding/decoding a digitized sequence of video frames in a multi-core system is described. The video codec comprises a memory unit; a multithreading engine. and a plurality of control and task modules organized in a tree structure, each module corresponding to a coding operation. The modules communicate with each other by control messages and shared memory. The control modules control all coding logic and workflow, and lower level task modules perform tasks and provide calculations upon receiving messages from the control task modules. The multithreading engine maintains context of each task and assigns at least one core to each task for execution. The method of coding/decoding comprises denoising, core motion estimation, distributed motion estimation, weighted texture prediction and error resilient decoding.

Abstract: A video codec for real-time encoding/decoding of digitized video data with high compression efficiency, comprising a frame encoder receiving input frame pixels; a codec setting unit for setting and storing coding setting parameters; a CPU load controller for controlling desired frame encoding time and CPU loading; a rate controller for controlling frame size; a coding statistics memory for storing frequency tables for arithmetic coding of bitstream parameters and a reference frame buffer for storing reference frames. The frame encoder comprises a motion estimation unit, a frame head coding unit, a coded frame reconstruction and storage unit and a macroblock encoding unit. The macroblock encoding unit provides calculation of texture prediction and prediction error, transforming texture prediction error and quantization of transform coefficient, calculation of motion vector prediction and prediction error and arithmetic context modeling for motion vectors, header parameters and transform coefficients.