Patents by Inventor Alexis BOUTILLER

Alexis BOUTILLER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11416352
    Abstract: A distributed system implementation for cache coherence comprises distinct agent interface units, coherency controllers, and memory interface units. The agents send requests in the form of read and write transactions. The system also includes a memory that includes coherent memory regions. The memory is in communication with the agents. The system includes a coherent interconnect in communication with the memory and the agents. The system includes a second identical coherent interconnect in communication with the memory and the agents. The system also includes a comparator for comparing at least two inputs, the comparator is in communication with the two coherent interconnects.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: August 16, 2022
    Assignee: ARTERIS, INC.
    Inventors: Jean Philippe Loison, Benoit de Lescure, Alexis Boutiller, Rohit Bansal, Parimal Gaikwad, Mohammed Khaleeluddin
  • Patent number: 11176297
    Abstract: A resilient system implementation in a network-on-ship with at least one functional logic unit and at least one duplicated logic unit. A resilient system and method, in accordance with the invention, are disclosed for detecting a fault or an uncorrectable error and isolating the fault. Isolation of the fault prevents further propagation of the fault throughout the system. The resilient system includes isolation logic or an isolation unit that isolates the fault.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: November 16, 2021
    Assignee: ARTERIS, INC.
    Inventors: Alexis Boutiller, Benoit de Lescure
  • Patent number: 10902166
    Abstract: A resilient system implementation in a network-on-ship with at least one functional logic unit and at least one duplicated logic unit. A resilient system and method, in accordance with the invention, are disclosed for detecting a fault or an uncorrectable error and isolating the fault. Isolation of the fault prevents further propagation of the fault throughout the system. The resilient system includes isolation logic or an isolation unit that isolates the fault.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: January 26, 2021
    Assignee: ARTERIS, INC.
    Inventors: Benoit de Lescure, Alexis Boutiller
  • Publication number: 20200193077
    Abstract: A resilient system implementation in a network-on-ship with at least one functional logic unit and at least one duplicated logic unit. A resilient system and method, in accordance with the invention, are disclosed for detecting a fault or an uncorrectable error and isolating the fault. Isolation of the fault prevents further propagation of the fault throughout the system. The resilient system includes isolation logic or an isolation unit that isolates the fault.
    Type: Application
    Filed: February 25, 2020
    Publication date: June 18, 2020
    Applicant: ARTERIS, INC.
    Inventors: Alexis BOUTILLER, Benoit de LESCURE
  • Publication number: 20200159631
    Abstract: A distributed system implementation for cache coherence comprises distinct agent interface units, coherency controllers, and memory interface units. The agents send requests in the form of read and write transactions. The system also includes a memory that includes coherent memory regions. The memory is in communication with the agents. The system includes a coherent interconnect in communication with the memory and the agents. The system includes a second identical coherent interconnect in communication with the memory and the agents.
    Type: Application
    Filed: November 15, 2019
    Publication date: May 21, 2020
    Applicant: ARTERIS, INC.
    Inventors: Jean Philippe Loison, Benoit deLESCURE, Alexis BOUTILLER, Rohit BANSAL, Parimal GAIKWAD
  • Patent number: 10592358
    Abstract: A distributed system implementation for cache coherence comprises distinct agent interface units, coherency controllers, and memory interface units. The agents send requests in the form of read and write transactions. The system also includes a memory that includes coherent memory regions. The memory is in communication with the agents. The system includes a coherent interconnect in communication with the memory and the agents. The system includes a second identical coherent interconnect in communication with the memory and the agents. The system also includes a comparator for comparing at least two inputs, the comparator is in communication with the two coherent interconnects.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: March 17, 2020
    Assignee: ARTERIS, INC.
    Inventors: Benoit deLescure, Jean Philippe Loison, Alexis Boutiller, Rohit Bansal, Parimal Gaikwad
  • Patent number: 10452499
    Abstract: A distributed system implementation for cache coherence comprises distinct agent interface units, coherency controllers, and memory interface units. The agents send requests in the form of read and write transactions. The system also includes a memory that includes coherent memory regions. The memory is in communication with the agents. The system includes a coherent interconnect in communication with the memory and the agents. The system includes a second identical coherent interconnect in communication with the memory and the agents. The system also includes a comparator for comparing at least two inputs, the comparator is in communication with the two coherent interconnects.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: October 22, 2019
    Assignee: ARTERIS, INC.
    Inventors: Benoit de Lescure, Jean Philippe Loison, Alexis Boutiller
  • Publication number: 20190205489
    Abstract: A resilient system implementation in a network-on-ship with at least one functional logic unit and at least one duplicated logic unit. A resilient system and method, in accordance with the invention, are disclosed for detecting a fault or an uncorrectable error and isolating the fault. Isolation of the fault prevents further propagation of the fault throughout the system. The resilient system includes isolation logic or an isolation unit that isolates the fault.
    Type: Application
    Filed: December 13, 2018
    Publication date: July 4, 2019
    Applicant: Arteris, Inc.
    Inventors: Benoit de LESCURE, Alexis BOUTILLER
  • Publication number: 20180322021
    Abstract: A distributed system implementation for cache coherence comprises distinct agent interface units, coherency controllers, and memory interface units. The agents send requests in the form of read and write transactions. The system also includes a memory that includes coherent memory regions. The memory is in communication with the agents. The system includes a coherent interconnect in communication with the memory and the agents. The system includes a second identical coherent interconnect in communication with the memory and the agents.
    Type: Application
    Filed: July 16, 2018
    Publication date: November 8, 2018
    Applicant: Arteris, Inc.
    Inventors: Benoit de LESCURE, Jean Philippe LOISON, Alexis BOUTILLER
  • Patent number: 10025677
    Abstract: A distributed system implementation for cache coherence comprises distinct agent interface units, coherency controllers, and memory interface units. The agents send requests in the form of read and write transactions. The system also includes a memory that includes coherent memory regions. The memory is in communication with the agents. The system includes a coherent interconnect in communication with the memory and the agents. The system includes a second identical coherent interconnect in communication with the memory and the agents. The system also includes a comparator for comparing at least two inputs, the comparator is in communication with the two coherent interconnects.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: July 17, 2018
    Assignee: ARTERIS, Inc.
    Inventors: Benoit de Lescure, Jean Philippe Loison, Alexis Boutiller
  • Publication number: 20180173597
    Abstract: A distributed system implementation for cache coherence comprises distinct agent interface units, coherency controllers, and memory interface units. The agents send requests in the form of read and write transactions. The system also includes a memory that includes coherent memory regions. The memory is in communication with the agents. The system includes a coherent interconnect in communication with the memory and the agents. The system includes a second identical coherent interconnect in communication with the memory and the agents.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 21, 2018
    Applicant: Arteris, Inc.
    Inventors: Benoit de LESCURE, Jean Philippe LOISON, Alexis BOUTILLER
  • Publication number: 20180157545
    Abstract: A distributed system implementation for cache coherence comprises distinct agent interface units, coherency controllers, and memory interface units. The agents send requests in the form of read and write transactions. The system also includes a memory that includes coherent memory regions. The memory is in communication with the agents. The system includes a coherent interconnect in communication with the memory and the agents. The system includes a second identical coherent interconnect in communication with the memory and the agents.
    Type: Application
    Filed: December 27, 2016
    Publication date: June 7, 2018
    Applicant: Arteris, Inc.
    Inventors: Benoit deLESCURE, Jean Philippe LOISON, Alexis BOUTILLER, Rohit BANSAL, Parimal GAIKWAD