Abstract: A row-select circuit for an organic light emitting diode display propagates a gating pulse through a shift register. This gating pulse is synchronized with a system clock signal and is used to selectively apply a plurality of broadcast control signals to a selected row of pixels on the display. The line scanning circuitry is controlled to clear and autozero the pixels in the display either one line at a time or the entire image frame at a time. According to another aspect of the invention, the clearing of a row of pixels in the display is performed over several line intervals before the row is autozeroed and loaded with new values. According to yet another aspect of the invention, the broadcast control signals may be adapted to achieve the best performance for each display device.

Abstract: A circuit design technique polysilicon thin-film transistor (TFT) circuitry produces circuits that are relatively less sensitive to threshold variations among the TFT's than circuits designed using conventional techniques. The circuit is designed such that thin-film transistors that are sensitive to threshold variations are made larger than other thin-film transistors in the circuitry to minimize threshold variations among similar transistors implemented in the circuit. In one embodiment, a pixel structure for an active matrix display device implemented in polysilicon includes two transistors, a select transistor and a drive transistor. The drive transistor in the pixel structure is a thin film metal oxide silicon (MOS) transistor that includes a gate to source capacitance sufficient to hold an electrical potential which keeps the transistor in a conducting state for an image field interval. One embodiment of the pixel structure includes only the select transistor and the drive transistor.

Abstract: A LED pixel structure that reduces current nonuniformities and threshold voltage variations in a “drive transistor”of the pixel structure is disclosed. The LED pixel structure incorporates a current source for loading data into the pixel via a data line. Alternatively, an auto zero voltage is determined for the drive transistor prior to the loading of data.

Abstract: In an active matrix electroluminescent display, a pixel containing a electroluminescent cell and the switching electronics for the electroluminescent cell where said switching electronics contains two transistors, a low voltage MOS transistor and a high voltage MOS transistor. A low voltage transistor is controlled by signals on a data and a select line. When activated, the low voltage transistor activates the high voltage transistor by charging the gate of the high voltage transistor. The gate charge is stored between the gate electrode of the high voltage transistor and an electric field shield forming a pixel signal capacitor. The pixel signal capacitor is positioned within the layout of the pixel a distance from the drain of the high voltage MOS transistor.

Abstract: A pixel structure for use in a display using organic light emitting diodes (O-LEDs) is described. Each pixel structure of an overall array includes an organic light emitting diode (O-LED). Additionally, the structure includes circuitry for allowing the structure to operate in three basic modes: write select mode, write deselect mode and an illuminate mode. Hence, the structure includes circuitry for causing the pixel structure to be selected such that data can be written to the pixel structure, said data representative of a programmed current level to be applied to the O-LED; circuitry for causing the pixel structure to be deselected when a pixel structure in a different row is having data written thereto; and circuitry for applying the programmed current level to the OLED, causing the O-LED to illuminate.

Abstract: In an active matrix electroluminescent display, a pixel containing a grounded conductive electric field shield between an EL cell and the switching electronics for the EL cell. In a method of fabricating the pixel, first, an EL cell switching circuit is formed, then an insulating layer is formed over the switching circuit and a conductive layer (the field shield) is formed over the insulating layer. A through hole is provided in the field shield such that an electrical connection can be made between the switching circuit and an EL cell. The EL cell is then conventionally formed on top of the shield layer. Consequently, the shield isolates the switching circuit from the EL cell and ensures that any electric fields produced in the EL cell do not interfere with the operation of the switching electronics. Furthermore, the switching circuitry for each cell contains two transistors; a low voltage MOS transistor and a high voltage MOS transistor.

Abstract: In an active matrix electroluminescent display, a pixel containing a grounded conductive electric field shield between an EL cell and the switching electronics for the EL cell. In a method of fabricating the pixel, first, an EL cell switching circuit is formed, then an insulating layer is formed over the switching circuit and a conductive layer (the field shield) is formed over the insulating layer. A through hole is provided in the field shield such that an electrical connection can be made between the switching circuit and an EL cell. The EL cell is then conventionally formed on top of the shield layer. Consequently, the shield isolates the switching circuit from the EL cell and ensures that any electric fields produced in the EL cell do not interfere with the operation of the switching electronics. Furthermore, the switching circuitry for each cell contains two transistors; a low voltage MOS transistor and a high voltage MOS transistor.

Abstract: The integrated circuit is manufactured upside down relative to conventional silicon-on-sapphire (SOS) processing techniques for manufacturing field effect transistors. First a conductive pattern, typically of a refractory metal, is deposited and defined on an insulating substrate, such as sapphire, and then silicon transistors are formed over the conductive pattern. Using the process, a masking step, namely the contact definition mask, used in conventional SOS manufacture, is eliminated.

Abstract: A composition of matter produced by a process wherein silicon is bombarded by phosphorus ions and phosphorus ions are implanted therein. A method for rendering silicon substantially unetchable in a potassium hydroxide etchant by implanting phosphorus in the silicon by brombardment with phosphorus ions.

Abstract: An integrated circuit device comprises a layer of semiconductor material on an insulating substrate. At least two spaced-apart circuit components, such as field-effect transistors, are formed in the layer of semiconductor material. The circuit components are electrically isolated from each other by a method of (1) forming a layer of insulating material over the layer of semiconductor material and between the circuit components, (2) forming a layer of electrically conductive material over the layer of insulating material, and (3) providing bias means between the layer of conductive material and the layer of semiconductor material so as to deplete completely a region in the layer of semiconductor material opposite to the layer of conductive material and between the circuit components.

Abstract: An improvement in polycrystalline silicon gate MOS integrated circuits made of silicon mesas on a sapphire substrate is provided. The improvement is an extension of a polycrystalline silicon gate onto the sapphire substrate as a single crystal layer. The single crystal layer is anisotrophically etched to slant its sidewalls. Metal contacts traversing the slanted sidewalls exhibit increased continuity and the single crystal layer exhibits improved conductivity. The polycrystalline silicon and single crystal silicon are formed simultaneously from a single source.

Abstract: The breakdown voltage of a novel insulated gate field effect transistor (IGFET), comprising silicon on sapphire (SOS), is substantially doubled by a novel structure wherein a dielectric layer, formed over a channel region of the IGFET, also extends continuously over the surface of the sapphire on opposite sides of the channel region. A polysilicon gate electrode is disposed over the dielectric layer, the gate electrode extending beyond the channel region and being separated from the sapphire substrate by the dielectric layer. The novel method of making the IGFET comprises providing an island of epitaxially deposited doped silicon on the sapphire substrate, and dielectric layer extending continuously over both the island and over portions of the substrate on opposite sides of the island.