Patents by Inventor Alfred Huang
Alfred Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240154912Abstract: Methods, systems, and devices for wireless communications are described. A first device may receive signaling associated with a traffic class from a second device. The first device may determine that the traffic class is included in a set of known traffic classes based on a set of features associated with the signaling. In response to determining that the traffic class is included in the set of known traffic classes, the first device may use a machine learning model to obtain a prediction of an application associated with the signaling. The prediction may be based on the set of features. The machine learning model may be trained at the first device or the second device. The first device may receive information associated with the machine learning model from the second device.Type: ApplicationFiled: January 27, 2023Publication date: May 9, 2024Inventors: Gaurang Naik, Sai Yiu Duncan Ho, George Cherian, Yanjun Sun, Abhishek Pramod Patil, Alfred Asterjadhi, Abdel Karim Ajami, Xiaolong Huang, Qiang Fan, Srinivas Katar, Nitin Ravinder, Venkata Savitri Pravallika Tallapragada, Varshini Rajesh, Raamkumar Balamurthi
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Publication number: 20240154911Abstract: Methods, systems, and devices for wireless communications are described. A first device may receive signaling associated with a traffic class from a second device. The first device may determine that the traffic class is included in a set of known traffic classes based on a set of features associated with the signaling. In response to determining that the traffic class is included in the set of known traffic classes, the first device may use a machine learning model to obtain a prediction of an application associated with the signaling. The prediction may be based on the set of features. The machine learning model may be trained at the first device or the second device. The first device may receive information associated with the machine learning model from the second device.Type: ApplicationFiled: November 7, 2022Publication date: May 9, 2024Inventors: Gaurang Naik, Sai Yiu Duncan Ho, George Cherian, Yanjun Sun, Abhishek Pramod Patil, Alfred Asterjadhi, Abdel Karim Ajami, Xiaolong Huang, Qiang Fan, Srinivas Katar, Nitin Ravinder, Venkata Savitri Pravallika Tallapragada, Varshini Rajesh, Raamkumar Balamurthi
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Publication number: 20240090010Abstract: Techniques related to wireless communication are disclosed. Some aspects of the disclosure relate to devices and methods for improving a quality of service (QoS) by reporting near-real-time feedback relating to a delay experienced by packets queued for transmission, and dynamically scheduling a wireless station to transmit and meet its QoS. A wireless station (STA) obtains one or more packets for transmission, the packets being associated with a delay condition. The STA outputs for transmission a delay status report that includes information relating to the delay condition associated with the one or more packets. In response, the STA obtains a resource allocation for transmission of the one or more packets according to the information relating to the delay condition. Other aspects, embodiments, and features are also claimed and described.Type: ApplicationFiled: September 12, 2022Publication date: March 14, 2024Inventors: Abdel Karim Ajami, Sai Yiu Duncan Ho, Alfred Asterjadhi, George Cherian, Abhishek Pramod Patil, Yanjun Sun, Gaurang Naik, Naveen Gangadharan, Nathaniel David Houghton, Srinivas Katar, Xiaolong Huang
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Patent number: 10977018Abstract: Implementing an application within a heterogeneous device can include receiving an application specifying a plurality of hardware accelerators and having a plurality of sections corresponding to different subsystems of the heterogeneous device, wherein the plurality of sections are specified using different programming models. Compiling each section based on the programming model of the section and the subsystem of the heterogeneous device corresponding to the section into an accelerator representation. Linking the accelerator representations based on a platform of the heterogeneous device, generating a hardware implementation of the application for the heterogeneous device based on the linked accelerator implementations, and automatically generating program code configured to control one or more of the plurality of hardware accelerators of the hardware implementation.Type: GrantFiled: December 5, 2019Date of Patent: April 13, 2021Assignee: Xilinx, Inc.Inventors: L. James Hwang, Michael Gill, Tom Shui, Jorge E. Carrillo, Alfred Huang, Sudipto Chakraborty
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Patent number: 10762265Abstract: Using a high-level language (HLL) callable library for multiple instances of a core includes detecting, using computer hardware, a reference to an HLL library for a core within an HLL application, determining, using the computer hardware, a plurality of instances of the core by detecting function calls within the HLL application correlated to each of the plurality of instances of the core, and generating, using the computer hardware, interface code within the HLL application for each of the plurality of instances of the core using the HLL library. An executable version of the HLL application is generated, using the computer hardware, wherein the interface code for each of the plurality of instances of the core is bound to the respective instance of the core. The function calls can specify different parameterization files corresponding to the plurality of instances of the core.Type: GrantFiled: November 13, 2018Date of Patent: September 1, 2020Assignee: Xilinx, Inc.Inventors: Zhenman Fang, James L. Hwang, Alfred Huang, Michael Gill, Tom Shui
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Patent number: 10755013Abstract: Creating a high-level language (HLL) callable library for a hardware core can include automatically querying, using computer hardware, a metadata description of a core to determine a plurality of available ports of the core, automatically determining, using the computer hardware, an argument of a first function specified in a header file corresponding to the core, mapping, using the computer hardware, the argument to a first port of the plurality of available ports, and automatically generating and storing, using the computer hardware, an HLL library specifying a mapping of the argument to the first port of the core. The HLL library is configured for inclusion with a user application during compilation.Type: GrantFiled: November 13, 2018Date of Patent: August 25, 2020Assignee: Xilinx, Inc.Inventors: Zhenman Fang, James L. Hwang, Samuel A. Skalicky, Tom Shui, Michael Gill, Welson Sun, Alfred Huang, Jorge E. Carrillo, Chen Pan
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Patent number: 10289394Abstract: Utilities for use in generation of a single executable (e.g., single set of machine code) compatible with processors of multiple different architectures and/or versions with reduced levels of code bloating, no or limited changes to the source code, no or limited special code and/or data sections in the executable, and the like. Specifically, a compiler can selectively generate machine code for each of one or more particular C++ functions for each of a plurality of different processor versions and/or architectures in a “multi-version mode” or “multi-architecture mode” to allow such functions to perform better under different processor versions or architectures, avoid the need to maintain multiple entire object code sets for different processor versions or architectures, and allow for maintenance of a substantially complete C++ code mechanism.Type: GrantFiled: October 11, 2016Date of Patent: May 14, 2019Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Alfred Huang, William Y. Chen
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Publication number: 20180101370Abstract: Utilities for use in generation of a single executable (e.g., single set of machine code) compatible with processors of multiple different architectures and/or versions with reduced levels of code bloating, no or limited changes to the source code, no or limited special code and/or data sections in the executable, and the like. Specifically, a compiler can selectively generate machine code for each of one or more particular C++ functions for each of a plurality of different processor versions and/or architectures in a “multi-version mode” or “multi-architecture mode” to allow such functions to perform better under different processor versions or architectures, avoid the need to maintain multiple entire object code sets for different processor versions or architectures, and allow for maintenance of a substantially complete C++ code mechanism.Type: ApplicationFiled: October 11, 2016Publication date: April 12, 2018Inventors: ALFRED HUANG, WILLIAM Y. CHEN
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Patent number: 7669872Abstract: The disclosed folding mechanism comprises a rear frame member of a bicycle, which has a combining structure positioned at a front portion thereof, wherein the combining structure includes a first joining surface; a front frame member of the bicycle, which has a second joining surface positioned at a rear portion thereof for being joined with the first joining surface; at least one pivot structure, which is provided at an edge of the combining structure for connecting the front frame member, such that the front and rear frame members can relatively move on the pivot structure; and at least one binder, which is deposited at the combining structure of the rear frame member and a position on the front frame member adjacent to the combining structure for fixing the second joining surface of the front frame member and the first joining surface of the rear frame member at a combining position where the two joining surfaces contact mutually.Type: GrantFiled: August 31, 2007Date of Patent: March 2, 2010Assignee: Cycling & Health Tech Industry R & D CenterInventors: Alfred Huang, Wen-Pin Chiu, Yung-Chen Lai, Yu-Che Huang
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Patent number: 7585019Abstract: A seat reclining mechanism for a power wheelchair implements an actuator and a plurality of linkages mechanistically connected to the seat portion, back portion, arm rests and footrests of the wheelchair to recline the back portion and shift the seat in harmony with the center-of-gravity position of the wheelchair it is attached to synchronously. So that a user can be free from the risk of falling during operation of the seat reclining mechanism.Type: GrantFiled: December 4, 2006Date of Patent: September 8, 2009Assignee: Cycling & Health Tech Industry R & D CenterInventors: Alfred Huang, Shun-Yuan Chu
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Publication number: 20080129099Abstract: A seat reclining mechanism for a power wheelchair implements an actuator and a plurality of linkages mechanistically connected to the seat portion, back portion, arm rests and footrests of the wheelchair to recline the back portion and shift the seat in harmony with the center-of-gravity position of the wheelchair it attached to synchronously. So that a user can be free from the risk of falling during operation of the seat reclining mechanism.Type: ApplicationFiled: December 4, 2006Publication date: June 5, 2008Inventors: Alfred Huang, Shun-Yuan Chu
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Publication number: 20080067779Abstract: The disclosed folding mechanism comprises a rear frame member of a bicycle, which has a combining structure positioned at a front portion thereof, wherein the combining structure includes a first joining surface; a front frame member of the bicycle, which has a second joining surface positioned at a rear portion thereof for being joined with the first joining surface; at least one pivot structure, which is provided at an edge of the combining structure for connecting the front frame member, such that the front and rear frame members can relatively move on the pivot structure; and at least one binder, which is deposited at the combining structure of the rear frame member and a position on the front frame member adjacent to the combining structure for fixing the second joining surface of the front frame member and the first joining surface of the rear frame member at a combining position where the two joining surfaces contact mutually.Type: ApplicationFiled: August 31, 2007Publication date: March 20, 2008Inventors: Alfred Huang, Wen-Pin Chiu, Yung-Chen Lai, Yu-Che Huang