Abstract: Programmable memory devices having a cross-point array of polymer junctions with individually-programmed conductances are provided. In one aspect, a method of forming a memory device includes: forming first metal lines on an insulating substrate; forming polymeric resistance elements on the first metal lines; and forming second metal lines over the polymeric resistance elements with a single one of the polymeric resistance elements present at each intersection of the first/second metal lines forming a cross-point array. A memory device and a method of operating a memory device are also provided.

Abstract: An interconnect for a semiconductor device includes: a carrier; a UV programmable chip mounted on the carrier using a first array of solder connections; a UV light source mounted on the carrier using a second array of solder connections, the UV light source being in optical communication with the UV programmable chip; and a plurality of transmission lines extending on or through the carrier and providing electrical communication between the UV programmable chip and the UV light source.

Abstract: Techniques regarding encapsulating one or more superconducting devices of a quantum processor are provided. For example, one or more embodiments described herein can regard a method that can comprise depositing an adhesion layer onto a superconducting resonator and a silicon substrate that are comprised within a quantum processor. The superconducting resonator can be positioned on the silicon substrate. Also, the adhesion layer can comprise a chemical compound having a thiol functional group.

Abstract: An interfacial additive layer for decreasing the interfacial resistance/impedance of a silicon based electrode-containing device such as, for example, an energy storage device or a micro-resistor, is disclosed. The interfacial additive, which is composed of evaporated lithium fluoride, is formed between a silicon based electrode and a solid polymer electrolyte layer of the device. The evaporated lithium fluoride serves as ion conductive layer. The presence of such an interfacial additive layer increases the ion and electron mobile dependent performances at the silicon based electrode interface due to significant decrease in the resistance/impedance that is observed at the respective interface as well as the impedance observed in the bulk of the device.

Abstract: A method of fabricating a carbon nanotube based device, including forming a trench having a bottom surface and sidewalls on a substrate, selectively depositing a bi-functional compound having two reactive moieties in the trench, wherein a first of the two reactive moieties selectively binds to the bottom surface, converting a second of the two reactive moieties to a diazonium salt; and reacting the diazonium salt with a dispersion of carbon nanotubes to form a carbon nanotube layer bound to the bottom surface of the trench.

Abstract: Devices, methods, and/or computer-implemented methods that can facilitate formation of a self assembled monolayer on a quantum device are provided. According to an embodiment, a device can comprise a qubit formed on a substrate. The device can further comprise a self assembled monolayer formed on the qubit.

Abstract: A process for monitoring binding events, a coating compound, and a device for monitoring binding events are disclosed. The process includes providing two reservoirs that contain an electrically conductive fluid, wherein the reservoirs are separated by a membrane having a nanopore. The process also includes selecting a target compound, selecting a ligand based on the selection of the target compound, and preparing a coating that includes the coating compound, wherein the coating compound includes the ligand and a moiety that immobilizes the ligand. Additionally, the process includes applying the coating to the inner surface of the nanopore, adding the target compound to a conductive liquid in the first chamber, establishing a voltage gradient across the membrane, and electrically monitoring translocation of the target molecule. The device includes the reservoirs and the membrane having the coated nanopore.

Abstract: Programmable devices and methods for fabricating the programmable devices are described. In an example, a method for fabricating a programmable device can include bonding a UV light source to a computer chip by flip-chip mounting the UV light source to the computer chip. The UV light source can be configured to emit UV light towards a UV erasable area of the computer chip to perform UV erasing on the computer chip. The method can further include bonding a carrier to the computer chip by flip chip mounting the computer chip to the carrier using a second array of bond pads.

Abstract: An energy storage device is provided that includes a pre-lithiated silicon based anode and a carbon nanotube based cathode. The pre-lithiated silicon anode has a porous region and a non-porous region. The full cell energy storage device has high electrochemical performance which exhibits greater 200 rechargeable cycles with less than 25% after 10 charge discharge cycles relative to the first discharge cycle, a maximum specific discharge capacity greater than 300 mAh/g and a specific capacity of greater than 100 mAh/g for over 130 cycles. Such an energy storage device is scalable for a wide array of applications due to its wafer level processing and silicon-based substrate integrability.

Abstract: Enhanced compositions and methods are provided for selectively etching silicon wafers, which is particularly useful in the context of silicon wafer manufacturing and processing applications. Optionally, a formulation is provided which selectively etches silicon dioxide in preference to aluminum oxide. Optionally, a formulation and method are provided that is substantially non-aqueous.

Abstract: A method of forming a resistive random access memory (RRAM) element, the method includes forming a Silicon layer on an oxide layer, depositing a thin film dopant layer on the Silicon layer, and controlling a concentration of the dopant in the thin film dopant layer.

Abstract: Techniques regarding encapsulating one or more superconducting devices of a quantum processor are provided. For example, one or more embodiments described herein can regard a method that can comprise depositing an adhesion layer onto a superconducting resonator and a silicon substrate that are comprised within a quantum processor. The superconducting resonator can be positioned on the silicon substrate. Also, the adhesion layer can comprise a chemical compound having a thiol functional group.

Abstract: The compositions described herein include a substrate, wherein the substrate is a metal, metal oxide, metal nitride or a silicon containing material; a self-assembled monolayer (SAM) bonded to the substrate, wherein the self-assembled monolayer comprises: a surface binding unit bonded to the substrate, wherein the surface binding unit is selected from the group consisting of hydroxamates, phosphonates, catechols, halosilanes, alkoxysilanes, phosphonic acids, alkenes, alkynes, alcohols, 1,2-diols, and thiols; a separator unit bonded to the surface binding unit; a mass altering unit bonded to the separator unit; and a detector unit bonded to the separator unit.

Abstract: Programmable memory devices having a cross-point array of polymer junctions with individually-programmed conductances are provided. In one aspect, a method of forming a memory device includes: forming first metal lines on an insulating substrate; forming polymeric resistance elements on the first metal lines; and forming second metal lines over the polymeric resistance elements with a single one of the polymeric resistance elements present at each intersection of the first/second metal lines forming a cross-point array. A memory device and a method of operating a memory device are also provided.

Abstract: A computer-implemented method of forming a thermal-based electronic image of an object that includes receiving electromagnetic radiation emitted by the object at an optically sensitive layer including a superpixel having a plurality of pixels. Each pixel of the plurality of pixels includes a plasmonic absorber having a characteristic resonance wavelength and that generates a radiance measurement of the electromagnetic radiation at its characteristic resonance wavelength. The method further provides for determining, at a processor, an emissivity and temperature for the electromagnetic radiation received at the superpixel using the radiance measurements obtained at the pixels of the superpixel. In addition, the method provides for forming an image of the object from the determined emissivity and temperature.

Abstract: A computer-eimplemented thermal imaging device having an optically-sensitive layer that includes a superpixel having at least one pixel. The at least one pixel includes a plasmonic absorber configured to obtain radiance measurements of electromagnetic radiation emitted from an object at a plurality of wavelengths. The device further includes a processor configured to determine an emissivity and temperature for the electromagnetic radiation received at the plasmonic material from the object using the radiance measurements and to form an image of the object from the determined emissivity and temperature.

Abstract: Memory devices are provided having a cross-point array of polymer junctions with individually-programmed conductances that can be reset. In one aspect, a memory device is provided. The memory device includes: bottom metal lines; top metal lines; and polymer junctions in between the bottom metal lines and the top metal lines, wherein the polymer junctions include an organic polymer doped with a spiropyran and an acid. A method of forming and a method of operating the memory device are also provided.

Abstract: A computer-implemented method and thermal imaging device includes a layer of plasmonic material and a processor. The layer of plasmonic material receive electromagnetic radiation from an object and generates radiance measurements of the electromagnetic radiation at a plurality of wavelengths. The processor determines an emissivity and temperature of the object from the radiance measurements and forms a thermal-based electronic image of the object from the determined emissivity and temperature.

Abstract: A catholyte-like material including a cathode material and an interfacial additive layer for providing a lithium ion energy storage device having low impedance is disclosed. The interfacial additive layer, which is composed of vapor deposited iodine, is present between the cathode material and an electrolyte layer of the device. The presence of such an interfacial additive layer increases the ion and electron mobile dependent performances at the cathode material interface due to significant decrease in the resistance/impedance that is observed at the respective interface as well as the impedance observed in the bulk of the device. The catholyte-like material of the present application can be used to provide a lithium ion energy storage device having high charge/discharge rates and/or high capacity.

Abstract: An interfacial additive layer for decreasing the interfacial resistance/impedance of a silicon based electrode-containing device such as, for example, an energy storage device or a micro-resistor, is disclosed. The interfacial additive, which is composed of evaporated lithium fluoride, is formed between a silicon based electrode and a solid polymer electrolyte layer of the device. The evaporated lithium fluoride serves as ion conductive layer. The presence of such an interfacial additive layer increases the ion and electron mobile dependent performances at the silicon based electrode interface due to significant decrease in the resistance/impedance that is observed at the respective interface as well as the impedance observed in the bulk of the device.