Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a vertical field effect transistor with optimized fin size and improved fin stability and methods of manufacture. The structure includes: a fin structure composed of substrate material, the fin structure includes: a trimmed channel region of the substrate material; a top source/drain region above the trimmed channel region and having a larger cross-section than the trimmed channel region; and a bottom source/drain region below the trimmed channel region and having a larger cross-section than the trimmed channel region; and gate material surrounding the trimmed channel region.

Abstract: Structures for a field-effect transistor and methods of forming structures for a field-effect transistor. A source/drain region is connected with a channel layer, and a gate structure extends across the channel layer. The channel layer is composed of a two-dimensional material.

Abstract: Fabricating a steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin disposed on the substrate, a source/drain disposed on the substrate adjacent to the fin, a gate disposed upon the fin, a cap disposed on the gate, a trench contact formed on and in contact with the source/drain, and a source/drain contact formed on an in contact with the trench contact. A recess is formed in a portion of the source/drain contact using a recess patterning process. A bi-stable resistive system (BRS) material is deposited in the recess in contact with the portion of the source/drain contact. A metallization layer is formed in contact upon the BRS material, a portion of the source/drain contact, the BRS material, and a portion of the metallization layer contact forming a reversible switch.

Abstract: Fabricating a steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin disposed on the substrate, a source/drain disposed on the substrate adjacent to the fin, a gate disposed upon the fin, a cap disposed on the gate, a trench contact formed on and in contact with the source/drain, and a source/drain contact formed on an in contact with the trench contact. A recess is formed in a portion of the source/drain contact using a recess patterning process. A bi-stable resistive system (BRS) material is deposited in the recess in contact with the portion of the source/drain contact. A metallization layer is formed in contact upon the BRS material, a portion of the source/drain contact, the BRS material, and a portion of the metallization layer contact forming a reversible switch.

Abstract: Fabricating a steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin disposed on the substrate, a source/drain disposed on the substrate adjacent to the fin, a gate disposed upon the fin, a cap disposed on the gate, a trench contact formed on and in contact with the source/drain, and a source/drain contact formed on an in contact with the trench contact. A recess is formed in a portion of the source/drain contact using a recess patterning process. A bi-stable resistive system (BRS) material is deposited in the recess in contact with the portion of the source/drain contact. A metallization layer is formed in contact upon the BRS material, a portion of the source/drain contact, the BRS material, and a portion of the metallization layer contact forming a reversible switch.

Abstract: Fabricating a steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin disposed on the substrate, a plurality of source/drains disposed on the substrate adjacent to the fin, a gate disposed upon the fin, a cap disposed on the gate, and a plurality of trenches, each trench extending to a corresponding one of the plurality of source/drains. A trench contact is formed in each of the trenches in contact with the corresponding source/drain. A recess is formed in a portion of each trench contact below a top surface of the cap. A bi-stable resistive system (BRS) material is deposited in each recess in contact with the portion of the trench contact. A source/drain contact is formed upon the BRS material, a portion of the trench contact, the BRS material, and a portion of the source/drain contact forming a reversible switch for each of the corresponding source/drains.

Abstract: Fabricating a steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin disposed on the substrate, a source/drain disposed on the substrate adjacent to the fin, a gate disposed upon the fin, a cap disposed on the gate, and a trench extending to the source/drain. A trench contact is formed in the trench in contact with the source/drain. A recess is formed in a portion of the trench contact below a top surface of the cap using a recess patterning process. A bi-stable resistive system (BRS) material is deposited in the recess in contact with the portion of the trench contact. A source/drain contact is formed upon the BRS material, a portion of the trench contact, the BRS material, and a portion of the source/drain contact forming a reversible switch.

Abstract: Fabricating a steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin disposed on the substrate, a source/drain disposed on the substrate adjacent to the fin, a gate disposed upon the fin, a cap disposed on the gate, a trench contact formed on and in contact with the source/drain, and a source/drain contact formed on an in contact with the trench contact. A recess is formed in a portion of the source/drain contact using a recess patterning process. A bi-stable resistive system (BRS) material is deposited in the recess in contact with the portion of the source/drain contact. A metallization layer is formed in contact upon the BRS material, a portion of the source/drain contact, the BRS material, and a portion of the metallization layer contact forming a reversible switch.

Abstract: The present disclosure relates generally to wrap around contact formation in source/drain regions of a semiconductor device such as an integrated circuit (IC), and more particularly, to stacked IC structures containing complementary FETs (CFETs) having wrap around contacts and methods of forming the same. Disclosed is a stacked IC structure including a first FET on a substrate, a second FET vertically stacked above the first FET, a dielectric layer above the second FET, and a spacer layer between FETs, wherein each FET has an electrically isolated wrap-around contact formed therearound.

Abstract: The present disclosure relates generally to wrap around contact formation in source/drain regions of a semiconductor device such as an integrated circuit (IC), and more particularly, to stacked IC structures containing complementary FETs (CFETs) having wrap around contacts and methods of forming the same. Disclosed is a stacked IC structure including a first FET on a substrate, a second FET vertically stacked above the first FET, a dielectric layer above the second FET, and a spacer layer between FETs, wherein each FET has an electrically isolated wrap-around contact formed therearound.

Abstract: Fabricating a negative capacitance steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin, a source/drain, a gate, a cap disposed upon the gate, a trench contact disposed upon the source/drain, and an inter-layer dielectric. A source/drain recess is formed in the inter-layer dielectric extending to the trench contact, and a gate recess is formed in the inter-layer dielectric extending to the gate. A ferroelectric material is deposited within the gate recess, and a source/drain contact is formed within the source/drain recess. A gate contact is formed within the gate recess, and a contact recess is formed in a portion of the source/drain contact. A bi-stable resistive system (BRS) material is formed in the contact recess, and a metallization layer contact is formed upon the BRS material. A portion of the source/drain contact, the BRS material, and a portion of the metallization layer contact forms a reversible switch.

Abstract: A method that includes forming a patterned stack of materials comprising at least one channel semiconductor material layer and first and second layers of sacrificial material positioned above and below, respectively, the at least one channel semiconductor material layer, forming a replacement gate cavity above the patterned stack of materials and performing an etching process through the gate cavity to selectively remove at least a portion of the first and second layers of sacrificial material relative to the at least one channel semiconductor material layer. The method further includes performing a second etching process to form a reduced-thickness portion of the channel semiconductor material layer that has a final thickness that is less than the initial thickness and forming a replacement gate structure around at least the reduced-thickness portion of the channel semiconductor material layer.