Abstract: Charging devices according to embodiments of the present technology may include a housing including an input configured to receive power from a power source and provide power to internal components of the charging device. The charging devices may include a ferrite. The ferrite may be coupled with electrical ground. The charging devices may also include a conductive coil seated in the ferrite. The conductive coil may be configured to generate an electromagnetic field from an AC signal.

Abstract: Charging devices according to embodiments of the present technology may include a housing including an input configured to receive power from a power source and provide power to internal components of the charging device. The charging devices may include a ferrite. The ferrite may be coupled with electrical ground. The charging devices may also include a conductive coil seated in the ferrite. The conductive coil may be configured to generate an electromagnetic field from an AC signal.

Abstract: A power circuit generating a non-isolating low voltage power supply using a capacitive AC voltage drop in standby. Specifically, the power circuit includes an AC connector that generates a first AC input and a second AC input that are opposite in phase. The power circuit also includes first and second diode bridge rectifier circuits that are coupled to the first AC input, the second AC input, and a ground. A first capacitor drops a voltage of the first AC input, and a second capacitor drops a voltage of the second AC input. The first diode bridge rectifier circuit provides a high voltage power signal to a load. The second diode bridge rectifier circuit provides a low voltage power signal to a microcontroller.

Abstract: A wafer is formed with metal traces that extend a distance across the wafer on opposite sides of a saw street. The resistances of the metal traces, which can each be formed from one or more layers of metal, are measured before the saw street is cut. During and after the saw street is cut, the resistances of the metal traces are again measured, even continuously. The pre-cut, during-cut, and post-cut resistances are compared to determine if the wafer has been cut without damage to the wafer due to misalignment or a worn cutting device.

Abstract: To achieve the foregoing, and in accordance with the purpose of the present invention, a method and apparatus for testing individual power and ground pins on a semiconductor integrated circuit are disclosed. The method and apparatus includes organizing the power pins of the die into a first group of power pins and a second group of power pins. Each of the first group of power pins are then connected through a first set of resistors to a first common node, and each of the second group of power pins through a second set of resistors to a second common node respectively. A voltage is next applied between the first and second nodes. The voltage at each of the first group of pins is compared with a first threshold voltage and the voltage at each of the second group of pins is compared with a second threshold voltage. Individual bad pins in the first and second groups are identified based on the comparison.

Abstract: A system and method for scanning a data-input array (e.g., a keyboard or keypad) using a reduced number of signals is disclosed. Specifically, a switch array is disclosed comprising a plurality of switches and a plurality of input/output (I/O) lines. The switch array is arranged in an N*N matrix. A plurality of N I/O lines is used to scan the matrix. In one embodiment, the switches in the array are arranged in an N*(N?1)/2 configuration. In this configuration, there is no duplication of circuit paths. In another embodiment, the switches in the array are arranged in an N(N?1) configuration. In this configuration, a plurality of diodes are used to identify an activated switch depending upon which of a plurality of signal paths is activated. The plurality of diodes is included to differentiate between pairs of switches that complete the same paths between pairs of I/O lines.

Abstract: A wafer is formed with metal traces that extend a distance across the wafer on opposite sides of a saw street. The resistances of the metal traces, which can each be formed from one or more layers of metal, are measured before the saw street is cut. During and after the saw street is cut, the resistances of the metal traces are again measured, even continuously. The pre-cut, during-cut, and post-cut resistances are compared to determine if the wafer has been cut without damage to the wafer due to misalignment or a worn cutting device.

Abstract: A system and method for determining when an external load is coupled to a digital-to-analog converter (DAC). Specifically, in one embodiment, a load detector circuit comprises a video DAC, an output circuit, a dumping circuit, and a determining circuit. The video DAC comprises a differential architecture including a first output and a second output working in opposite phase. The first DAC output is coupled to the output circuit, which drives the external load. The second DAC output is coupled to a dumping circuit, and is configured such that the dumping circuit is balanced with the output circuit when the external load is present. A determining circuit examines the two outputs of the DAC to determine if the dumping circuit is balanced with the output circuit, and thus if the external load is present.

Abstract: A VFD driver circuit includes a DC power supply coupled to cascaded first power operational amplifier (POA1) and second power operational amplifier (POA2). The POA1 is a self-oscillating power operational amplifier having a feedback circuit associated therewith whereas the POA2 is configured in an essentially inverting unity gain mode. The POA1 has a first POA1 output node coupled to a first terminal of a VFD filament and a second POA1 output node coupled to a first POA2 input node. The POA2 has a POA2 output node coupled to a second terminal of the VFD filament. The shape of the output waveform delivered by the POA1 is dependent upon the feedback circuit and can be any shape deemed suitable. Such shapes include a square wave, a sinusoidal wave, a triangular wave, a trapezoidal wave, clipped sinusoidal wave, and so on.