Abstract: A system and method for creating a graphical program operable to execute a timed loop. A loop may be displayed in the graphical program and configured with timing information in response to user input. The timing information may include an execution period which specifies a desired period at which the loop should execute during execution of the graphical program. The timing information may also include information such as a timing source, offset, and priority. During execution of the graphical program, the execution period of the loop may control the rate at which the loop executes.

Abstract: A system and method for viewing timing of one or more loops in a graphical program. A graphical program having one or more loops may be created. In one embodiment the one or more loops may include one or more timed loops, i.e., the loops may be configured to execute according to particular execution periods. The graphical program may be executed, and timing analysis data regarding timing of the one or more loops during execution of the graphical program may be stored. A graphical user interface (GUI) for viewing timing of the one or more loops during execution of the graphical program may be displayed. In various embodiments the GUI may display any of various kinds of information regarding timing of the one or more loops, and any kind of visual presentation may be used in displaying the information.

Abstract: A system and method for transferring data over a communications medium using data transfer links. A host computer may couple to a device through a serial bus. A buffer of contiguous virtual memory addresses may correspond to non-contiguous physical addresses, which may be stored in a linked list of transfer nodes, preserving the order of the original virtual buffer elements. Each transfer node specifies a data transfer between the host and device, and may be executed by the device DMA Controller. Each node may contain source and/or destination address information, size of the data to be transferred, and a link to the next node. The transfer nodes may be transferred to the device using a double-buffering scheme wherein the device executes the nodes from one half of the link buffer while the host computer transfers further nodes to be executed to the other half of the link buffer. The buffer halves may be switched back and forth between these two processes until all links are executed.

Abstract: System and method for performing time-bounded execution of a program. A timed program execution process is initiated, and a timeout process is initiated. A timeout condition is configured in the timeout process at a first priority level, and a rollback state determined for the program. Execution of the program is initiated in the timed program execution process at a second priority level below the first priority level. During execution of the program, the timeout process determines if the timeout condition has occurred, and if so, the timeout process restores the execution of the program to the rollback state, and the timed program execution process resumes execution of the program from the rollback state with the timeout condition. The program exits in the timed program execution process in response to the timeout condition, and the timeout event disabled. The timeout process is terminated, and the timed program execution process is terminated.

Abstract: System and method for transferring data to a device using double buffered data transfers. A host computer system couples to a data acquisition device. The device includes a first read buffer and a second read buffer for storing output data received from the host computer. The device reads first data from the computer and stores it in the first read buffer. The first data is transferred out from the first read buffer while the device reads second data from the computer and stores it in the second read buffer. The second data is transferred out from the second read buffer (after the transfer of the first data) while the device reads third data from the host computer and stores the third data in the first read buffer. Thus, the data acquisition device successively reads data into one read buffer concurrently with transferring data out from the other buffer, respectively.

Abstract: A system and method for transferring data over a communications medium. A host is coupled to a device through a serial bus lacking error handling capabilities, such as an IEEE 1394 bus. The host may control the device by sending requests accessing its memory registers. The host generates a first request to the device to access a memory address location of the device, and which includes an address and status information indicating whether a prior request to the memory address location returned successfully. The device examines the status information to determine if it is a retry of a prior request, and if so, determines if the prior request completed successfully to the memory address location by comparing the address and data transfer size of the first request to those of the prior request. If identical, then the prior request completed successfully to the memory address location, and the request is ignored. Otherwise, the device retries the prior request.

Abstract: A system may include a communication medium, a master node, and a slave node. The master node may send several sets of synchronization messages on the communication medium. Each set of synchronization messages includes several synchronization messages. The slave node may receive each set of synchronization messages and to select a synchronization message having an optimal delay from each set of synchronization messages. The slave node may calculate a correction for a slave clock included in the slave node in response to timing information associated with the synchronization message having the optimal delay in each set. The slave node may not calculate a correction for the slave clock in response to timing information associated with at least some of the synchronization messages in each set. The communication medium may convey at least one synchronization message within each of the sets with a minimum delay.

Abstract: A device and method are disclosed for the acquisition of data at high flow rates and with high accuracy. The device, called a “Selective Digital Integrator” (SDI), provides many improved features relative to older techniques, and in certain instances it provides a less-expensive replacement for lock-in amplifiers while affording greater functionality and versatility. The device can be integrated into existing instrumentation and technology for high-resolution measurements using various radiation sources (e.g., lamps, lasers, synchrotrons), various polarizations (e.g., linear, circular, elliptical), and various detectors (e.g., photo multipliers, diodes). Unlike the case with conventional lock-in amplifiers, the signal need not be known (or presumed) in advance to have a particular shape, but instead may have an arbitrary or unknown waveform.