Patents by Inventor Allan P. Ilagan

Allan P. Ilagan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit packaging system with side solderable leads and method of manufacture thereof
    Patent number: 9048228
    Abstract: A system and method of manufacture of an integrated circuit packaging system includes: a leadframe having a side solderable lead with a half-etched lead portion and a lead top side; a mold body directly on the leadframe and the side solderable lead, the lead top side of the side solderable lead exposed from the mold body; a mold groove in the mold body and in a portion of the side solderable lead for exposing a lead protrusion of the side solderable lead on an upper perimeter side of the mold body; and the half-etched lead portion exposed from a lower perimeter side of the mold body.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: June 2, 2015
    Assignee: STATS ChipPAC Ltd.
    Inventors: Byung Tai Do, Emmanuel Espiritu, Allan P. Ilagan, Marites Laguipo Roque
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SIDE SOLDERABLE LEADS AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20150084172
    Abstract: A system and method of manufacture of an integrated circuit packaging system includes: a leadframe having a side solderable lead with a half-etched lead portion and a lead top side; a mold body directly on the leadframe and the side solderable lead, the lead top side of the side solderable lead exposed from the mold body; a mold groove in the mold body and in a portion of the side solderable lead for exposing a lead protrusion of the side solderable lead on an upper perimeter side of the mold body; and the half-etched lead portion exposed from a lower perimeter side of the mold body.
    Type: Application
    Filed: September 26, 2013
    Publication date: March 26, 2015
    Inventors: Byung Tai Do, Emmanuel Espiritu, Allan P. Ilagan, Marites Laguipo Roque
  • Integrated circuit packaging system with interconnect and method of manufacture thereof
    Patent number: 8304921
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a planar support structure having a cavity; forming a terminal within the cavity with the terminal coplanar with the planar support structure; forming a conductive pathway on the terminal and the planar support structure with the conductive pathway having a route portion and an interconnect attach portion at the end of the route portion; connecting a device and the interconnect attach portion with the interconnect attach portion towards the device; and forming an encapsulation over the planar support structure covering the conductive pathway and the device.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: November 6, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Allan P. Ilagan, Philip Lyndon Cablao
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20110115065
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a planar support structure having a cavity; forming a terminal within the cavity with the terminal coplanar with the planar support structure; forming a conductive pathway on the terminal and the planar support structure with the conductive pathway having a route portion and an interconnect attach portion at the end of the route portion; connecting a device and the interconnect attach portion with the interconnect attach portion towards the device; and forming an encapsulation over the planar support structure covering the conductive pathway and the device.
    Type: Application
    Filed: November 13, 2009
    Publication date: May 19, 2011
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Allan P. Ilagan, Philip Lyndon Cablao
  • Integrated circuit packaging system with interposer
    Patent number: 7911046
    Abstract: An integrated circuit packaging system is provided including forming an interposer having a coupling slot, securing an upper die on the interposer, mounting the interposer over an integrated circuit, and coupling the integrated circuit to the upper die through the coupling slot.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: March 22, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Philip Lyndon Cablao, Rachel Layda Abinan, Dario S. Filoteo, Jr., Allan P. Ilagan
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER
    Publication number: 20090152704
    Abstract: An integrated circuit packaging system is provided including forming an interposer having a coupling slot, securing an upper die on the interposer, mounting the interposer over an integrated circuit, and coupling the integrated circuit to the upper die through the coupling slot.
    Type: Application
    Filed: February 24, 2009
    Publication date: June 18, 2009
    Inventors: Philip Lyndon Cablao, Rachel Layda Abinan, Dario S. Filoteo, Jr., Allan P. Ilagan
  • Integrated circuit packaging system with interposer
    Patent number: 7518226
    Abstract: An integrated circuit packaging system is provided including forming an interposer having a coupling slot, securing an upper die on the interposer, mounting the interposer over an integrated circuit, and coupling the integrated circuit to the upper die through the coupling slot.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: April 14, 2009
    Assignee: Stats Chippac Ltd.
    Inventors: Philip Lyndon Cablao, Rachel Layda Abinan, Dario S. Filoteo, Jr., Allan P. Ilagan
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER
    Publication number: 20080185719
    Abstract: An integrated circuit packaging system is provided including forming an interposer having a coupling slot, securing an upper die on the interposer, mounting the interposer over an integrated circuit, and coupling the integrated circuit to the upper die through the coupling slot.
    Type: Application
    Filed: February 6, 2007
    Publication date: August 7, 2008
    Inventors: Philip Lyndon Cablao, Rachel Layda Abinan, Dario S. Filoteo, Allan P. Ilagan