Abstract: This technology relates to rasterizing and compositing vector graphics in parallel on a data-parallel computing device. For example, vector data of the vector graphics, may be loaded into local memory accessible by the one or more parallel processors. The vector data may include one or more paths comprised of one or more path segments of the vector graphics. The one or more parallel processors may rasterize the one or more path segments into respective rasters and assign each of the rasters into groups based on pixel coordinates of the respective rasters. Each group may have an associated key and the rasters within each group represent a portion of the same vector graphic. The rasters may be placed onto subpixels according to their respective pixel coordinates and rendered onto a display by the one or more parallel processors.

Abstract: Aspects of the disclosure relate to determining relevant content in response to a request for information. One or more computing devices 170 may load data elements into registers 385A-385B, wherein each register is associated with at least one parallel processor in a group of parallel processors 380A-380B. For each of the parallel processors, the data elements loaded in its associated registers may be sorted, in parallel, in descending order. The sorted data elements, for each of the parallel processors, may be merged with the sorted data elements of other processors in the group. The merged and sorted data elements may be transposed and stored.

Abstract: Aspects of the disclosure relate to determining relevant content in response to a request for information. One or more computing devices (170) may load data elements into registers (385A-385B), wherein each register is associated with at least one parallel processor in a group of parallel processors (380A-380B). For each of the parallel processors, the data elements loaded in its associated registers may be sorted, in parallel, in descending order. The sorted data elements, for each of the parallel processors, may be merged with the sorted data elements of other processors in the group. The merged and sorted data elements may be transposed and stored.

Abstract: This technology relates to rasterizing and compositing vector graphics in parallel on a data-parallel computing device. For example, vector data of the vector graphics, may be loaded into local memory accessible by the one or more parallel processors. The vector data may include one or more paths comprised of one or more path segments of the vector graphics. The one or more parallel processors may rasterize the one or more path segments into respective rasters and assign each of the rasters into groups based on pixel coordinates of the respective rasters. Each group may have an associated key and the rasters within each group represent a portion of the same vector graphic. The rasters may be placed onto subpixels according to their respective pixel coordinates and rendered onto a display by the one or more parallel processors.

Abstract: This technology relates to rasterizing and compositing vector graphics in parallel on a data-parallel computing device. For example, vector data of the vector graphics, may be loaded into local memory accessible by the one or more parallel processors. The vector data may include one or more paths comprised of one or more path segments of the vector graphics. The one or more parallel processors may rasterize the one or more path segments into respective rasters and assign each of the rasters into groups based on pixel coordinates of the respective rasters. Each group may have an associated key and the rasters within each group represent a portion of the same vector graphic. The rasters may be placed onto subpixels according to their respective pixel coordinates and rendered onto a display by the one or more parallel processors.

Abstract: Aspects of the disclosure relate to determining relevant content in response to a request for information. One or more computing devices (170) may load data elements into registers (385A-385B), wherein each register is associated with at least one parallel processor in a group of parallel processors (380A-380B). For each of the parallel processors, the data elements loaded in its associated registers may be sorted, in parallel, in descending order. The sorted data elements, for each of the parallel processors, may be merged with the sorted data elements of other processors in the group. The merged and sorted data elements may be transposed and stored.