Patents by Inventor Allen K. Lam

Allen K. Lam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7667309
    Abstract: Efficient utilization of space in a laterally-conducting semiconductor device package is enhanced by creating at least one supplemental downbond pad portion of the diepad for receiving the downbond wire from the ground contact of the device. The supplemental diepad portion may occupy area at the end or side of the package formerly occupied by non-integral leads. By receiving the substrate downbond wire, the supplemental diepad portion allows a greater area of the main diepad to be occupied by a die having a larger area, thereby enhancing space efficiency of the package.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: February 23, 2010
    Assignee: GEM Services, Inc.
    Inventors: James Harnden, Allen K. Lam, Richard K. Williams, Anthony Chia, Chu Weibing
  • Patent number: 7485498
    Abstract: Efficient utilization of space in a laterally-conducting semiconductor device package is enhanced by creating at least one supplemental downbond pad portion of the diepad for receiving the downbond wire from the ground contact of the device. The supplemental diepad portion may occupy area at the end or side of the package formerly occupied by non-integral leads. By receiving the substrate downbond wire, the supplemental diepad portion allows a greater area of the main diepad to be occupied by a die having a larger area, thereby enhancing space efficiency of the package.
    Type: Grant
    Filed: February 2, 2007
    Date of Patent: February 3, 2009
    Assignee: GEM Services, Inc.
    Inventors: James Harnden, Allen K. Lam, Richard K. Williams, Anthony Chia, Chu Weibing
  • Publication number: 20080217662
    Abstract: Efficient utilization of space in a laterally-conducting semiconductor device package is enhanced by creating at least one supplemental downbond pad portion of the diepad for receiving the downbond wire from the ground contact of the device. The supplemental diepad portion may occupy area at the end or side of the package formerly occupied by non-integral leads. By receiving the substrate downbond wire, the supplemental diepad portion allows a greater area of the main diepad to be occupied by a die having a larger area, thereby enhancing space efficiency of the package.
    Type: Application
    Filed: March 14, 2008
    Publication date: September 11, 2008
    Applicant: GEM Services, Inc.
    Inventors: James Harnden, Allen K. Lam, Richard K. Williams, Anthony Chia, Chu Weibing
  • Patent number: 7215012
    Abstract: Efficient utilization of space in a laterally-conducting semiconductor device package is enhanced by creating at least one supplemental downbond pad portion of the diepad for receiving the downbond wire from the ground contact of the device. The supplemental diepad portion may occupy area at the end or side of the package formerly occupied by non-integral leads. By receiving the substrate downbond wire, the supplemental diepad portion allows a greater area of the main diepad to be occupied by a die having a larger area, thereby enhancing space efficiency of the package.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: May 8, 2007
    Assignee: GEM services, Inc.
    Inventors: James Harnden, Allen K. Lam, Richard K. Williams, Anthony Chia, Chu Weibing
  • Patent number: 6800932
    Abstract: A semiconductor package contains a plurality of sheet metal leads that are attached to one or more terminals on a top side of a semiconductor die. A heat sink is attached to a terminal on a bottom side of the die. Each of the leads extends across the die and beyond opposite edges of the die and is symmetrical about an axis of the die. At the locations where the leads pass over the edges of the die notches are formed on the sides of the leads which face the die, thereby assuring that there is no contact between the leads and the peripheral portion of the top surface of the die. Particularly in power MOSFETs the peripheral portion of the top surface normally contains an equipotential ring which is directly connected to the backside (drain) of the MOSFET, and hence a short between the leads on the top of the die and the equipotential ring would destroy the device. The result is a package that is extremely rugged and that is symmetrical about the axis of the die.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: October 5, 2004
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Allen K. Lam, Richard K. Williams, Alex K. Choi
  • Publication number: 20040173881
    Abstract: Efficient utilization of space in a laterally-conducting semiconductor device package is enhanced by creating at least one supplemental downbond pad portion of the diepad for receiving the downbond wire from the ground contact of the device. The supplemental diepad portion may occupy area at the end or side of the package formerly occupied by non-integral leads. By receiving the substrate downbond wire, the supplemental diepad portion allows a greater area of the main diepad to be occupied by a die having a larger area, thereby enhancing space efficiency of the package.
    Type: Application
    Filed: December 12, 2003
    Publication date: September 9, 2004
    Applicant: GEM Services, Inc.
    Inventors: James Harnden, Allen K. Lam, Richard K. Williams, Anthony Chia, Chu Weibing
  • Patent number: 6452802
    Abstract: A semiconductor package contains a plurality of sheet metal leads that are attached to one or more terminals on a top side of a semiconductor die. A heat sink is attached to a terminal on a bottom side of the die. Each of the leads extends across the die and beyond opposite edges of the die and is symmetrical about an axis of the die. At the locations where the leads pass over the edges of the die notches are formed on the sides of the leads which face the die, thereby assuring that there is no contact between the leads and the peripheral portion of the top surface of the die. Particularly in power MOSFETs the peripheral portion of the top surface normally contains an equipotential ring which is directly connected to the backside (drain) of the MOSFET, and hence a short between the leads on the top of the die and the equipotential ring would destroy the device. The result is a package that is extremely rugged and that is symmetrical about the axis of the die.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: September 17, 2002
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Allen K. Lam, Richard K. Williams, Alex K. Choi
  • Publication number: 20020071253
    Abstract: A semiconductor package contains a plurality of sheet metal leads that are attached to one or more terminals on a top side of a semiconductor die. A heat sink is attached to a terminal on a bottom side of the die. Each of the leads extends across the die and beyond opposite edges of the die and is symmetrical about an axis of the die. At the locations where the leads pass over the edges of the die notches are formed on the sides of the leads which face the die, thereby assuring that there is no contact between the leads and the peripheral portion of the top surface of the die. Particularly in power MOSFETs the peripheral portion of the top surface normally contains an equipotential ring which is directly connected to the backside (drain) of the MOSFET, and hence a short between the leads on the top of the die and the equipotential ring would destroy the device. The result is a package that is extremely rugged and that is symmetrical about the axis of the die.
    Type: Application
    Filed: January 30, 2002
    Publication date: June 13, 2002
    Inventors: Allen K. Lam, Richard K. Williams, Alex K. Choi
  • Publication number: 20010040277
    Abstract: A semiconductor package contains a plurality of sheet metal leads that are attached to one or more terminals on a top side of a semiconductor die. A heat sink is attached to a terminal on a bottom side of the die. Each of the leads extends across the die and beyond opposite edges of the die and is symmetrical about an axis of the die. At the locations where the leads pass over the edges of the die notches are formed on the sides of the leads which face the die, thereby assuring that there is no contact between the leads and the peripheral portion of the top surface of the die. Particularly in power MOSFETs the peripheral portion of the top surface normally contains an equipotential ring which is directly connected to the backside (drain) of the MOSFET, and hence a short between the leads on the top of the die and the equipotential ring would destroy the device. The result is a package that is extremely rugged and that is symmetrical about the axis of the die.
    Type: Application
    Filed: July 2, 2001
    Publication date: November 15, 2001
    Inventors: Allen K. Lam, Richard K. Williams, Alex K. Choi
  • Patent number: 6307755
    Abstract: A leadframe for making an electric connection to a semiconductor die contains a plurality of notches which correspond to the edges of the die. Shorts are thereby prevented between the leadframe and electrical elements near the edge of the die, even when the leadframe is bent in the direction of the die to make a surface mount package. Alternatively or additionally, the leads in the leadframe may contain moats which prevent the epoxy or solder used to attach the leadframe to a die from spreading outward and thereby creating electrical shorts with other leads.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: October 23, 2001
    Inventors: Richard K. Williams, Allen K. Lam, Alexander K. Choi
  • Patent number: 6256200
    Abstract: A semiconductor package contains a plurality of sheet metal leads that are attached to one or more terminals on a top side of a semiconductor die. A heat sink is attached to a terminal on a bottom side of the die. Each of the leads extends across the die and beyond opposite edges of the die and is symmetrical about an axis of the die. At the locations where the leads pass over the edges of the die notches are formed on the sides of the leads which face the die, thereby assuring that there is no contact between the leads and the peripheral portion of the top surface of the die. Particularly in power MOSFETs the peripheral portion of the top surface normally contains an equipotential ring which is directly connected to the backside (drain) of the MOSFET, and hence a short between the leads on the top of the die and the equipotential ring would destroy the device. The result is a package that is extremely rugged and that is symmetrical about the axis of the die.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: July 3, 2001
    Inventors: Allen K. Lam, Richard K. Williams, Alex K. Choi
  • Patent number: D505121
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: May 17, 2005
    Assignee: GEM Services, Inc.
    Inventors: James Harnden, Richard K. Williams, Anthony Chia, Chu Weibing, Allen K. Lam
  • Patent number: D505122
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: May 17, 2005
    Assignee: GEM Services, Inc.
    Inventors: James Harnden, Richard K. Williams, Anthony Chia, Chu Weibing, Allen K. Lam
  • Patent number: D513608
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: January 17, 2006
    Assignee: GEM Services, Inc.
    Inventors: James Harnden, Richard K. Williams, Anthony Chia, Chu Weibing, Allen K. Lam
  • Patent number: D485808
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: January 27, 2004
    Assignee: GEM Services, Inc.
    Inventors: James Harnden, Richard K. Williams, Anthony Chia, Chu Weibing, Allen K. Lam
  • Patent number: D487431
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: March 9, 2004
    Assignee: GEM Services, Inc.
    Inventors: James Harnden, Richard K. Williams, Anthony Chia, Chu Weibing, Allen K. Lam
  • Patent number: D488136
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: April 6, 2004
    Assignee: GEM Services, Inc.
    Inventors: James Harnden, Richard K. Williams, Anthony Chia, Chu Weibing, Allen K. Lam