Abstract: A three-dimensional systolic architecture for beamforming according to convolve signals from an array with sets of weighting coefficients using a one dimensional array of similar modules with finite impulse response filter elements with outputs directed into pipelining register stacks and propagated to the stack boundaries for summing in accumulator arrays and demultiplexing.

Abstract: The method of self repair of large scale integrated circuit modules (LSI or VLSI) in which a series of systolic processing elements (SPE's) arranged in rows (V and H) normal to each other, have sequential paths between elements biased so that normally the data being processed follows the vertical and horizontal rows to maintain a selected topography including the steps of establishing the functionality of each SPE, bypassing any unfunctional SPE by directing the data path of any row to a rear SPE in the nest row, and directing the data path from the said near SPE back to the original row to maintain the original topography.