Abstract: A CMOS-based sensor apparatus comprises an array of sensor cells that are interconnected by a first set of vertical driver lines to a selective driver facility and by a second set of horizontal sensing lines to a sensing facility for sensing respectively sensed amounts of radiation. In particular, the sensor cells through being appropriately spaced in at least either row or column direction, comprise a redundancy facility that is selectively activatable for isolating an interconnect short on the basis of externally applied control actuation.

Abstract: A real-time pixel correction algorithm is proposed for on-the-fly repair of pixel information from dead or disturbed pixels from a pixel array. The algorithm can be used for both CCD and CMOS imagers.

Abstract: The invention relates to an image pick up device (401) with pixels arranged in rows and columns. Every pixel (301) comprises a photosensitive element (302), a floating diffusion (304), a transfer transistor (303), an amplifying transistor (305) having its control electrode connected to the floating diffusion (304), and a reset transistor (306). An external node (310) is coupled to a selection switch via a row selection bus (406). The selection switch (411) provides either a first bias voltage, generated by a first voltage source (409), or a second bias voltage, generated by a second volt age source (410), to the row selection bus (406). Applying the first bias voltage and simultaneously turning on the reset transistor (306) programs the floating diffusion (304) to the first bias voltage which biases the amplifying transistor (305) in an on-mode, thereby selecting the pixel (301).

Abstract: In a CMOS imager, each cell (1) comprises a photodiode (6) which is charged via a reset transistor (T1) before each integration period. During the integration period, the reset transistor is turned off by means of an appropriate gate voltage applied to the gate (7) of the reset transistor. In order to lower the FPN (fixed pattern noise), this blocking voltage is chosen to be lower than the supply voltage VDD. Surprisingly, it was found that leakage currents could be decreased considerably by this lower blocking voltage, possibly due to lower tunnel currents through the gate oxide which is very thin in modern CMOS processes. In a specific embodiment, said lower blocking voltage can be applied substantially without any limitation of the dynamic range of the imager.