Patents by Inventor Alper Buyuktosnoglu

Alper Buyuktosnoglu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures
    Patent number: 6834328
    Abstract: A cache and TLB layout and design leverage repeater insertion to provide dynamic low-cost configurability trading off size and speed on a per application phase basis. A configuration management algorithm dynamically detects phase changes and reacts to an application's hit and miss intolerance in order to improve memory hierarchy performance while taking energy consumption into consideration.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: December 21, 2004
    Assignee: University of Rochester
    Inventors: Sandhya Dwarkadas, Rajeev Balasubramonian, Alper Buyuktosnoglu, David Albonesi
  • Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures
    Publication number: 20040184340
    Abstract: A cache and TLB layout and design leverage repeater insertion to provide dynamic low-cost configurability trading off size and speed on a per application phase basis. A configuration management algorithm dynamically detects phase changes and reacts to an application's hit and miss intolerance in order to improve memory hierarchy performance while taking energy consumption into consideration.
    Type: Application
    Filed: January 27, 2004
    Publication date: September 23, 2004
    Applicant: UNIVERSITY OF ROCHESTER
    Inventors: Sandhya Dwarkadas, Rajeev Balasubramonian, Alper Buyuktosnoglu, David Albonesi
  • Dynamic reconfigurable memory hierarchy
    Patent number: 6684298
    Abstract: A cache and TLB layout and design leverage repeater insertion to provide dynamic low-cost configurability trading off size and speed on a per application phase basis. A configuration management algorithm dynamically detects phase changes and reacts to an application's hit and miss intolerance in order to improve memory hierarchy performance while taking energy consumption into consideration.
    Type: Grant
    Filed: November 9, 2000
    Date of Patent: January 27, 2004
    Assignee: University of Rochester
    Inventors: Sandhya Dwarkadas, Rajeev Balasubramonian, Alper Buyuktosnoglu, David Albonesi