Abstract: The process employs ion implantation for precise dopant control. The implantation is performed into a thin layer of amorphous silicon covering the emitter and collector opening. The implantation energy is chosen so that the damage is confined to the amorphous layer. Since the deposited silicon layer is to be removed by subsequent processing, its thickness must be carefully controlled. The layer is preferably deposited by a sputtering technique which allows the necessary uniformity and reproducibility of the layer thickness. Furthermore, the sputtering process with its energetic ions provides a reproducible quality interface which is of critical importance for a diffusion source. With such a source, the diffusion into the single crystal silicon extends about the same distance in the horizontal as the vertical direction. This provides the greatest possible horizontal displacement of the junction under the passivating silicon dioxide layer.

Abstract: A planar deep oxide isolation process for providing deep wide silicon dioxide filled trenches in the planar surface of a silicon semiconductor substrate, said process comprising the steps:(a) forming deep wide trenches in the planar surface of the silicon substrate;(b) forming a thin layer of silicon dioxide on the planar surface of the silicon substrate and the exposed silicon surfaces of said deep wide trenches;(c) applying resin glass (polysiloxane) to the planar surface of said semiconductor substrate and within said deep wide trenches;(d) spinning off at least a portion of the resin glass on the planar surface of the substrate;(e) baking the substrate at a low temperature;(f) exposing the resin glass contained within the deep wide trenches of substrate to the energy of an E-beam;(g) developing the resin glass contained on said substrate in a solvent;(h) heating said substrate in oxygen to convert said resin glass contained within said deep wide trenches to silicon dioxide;(i) depositing a layer of silico

Abstract: A method for forming a non-epitaxial bipolar integrated circuit comprising first forming in a silicon substrate of one-type of conductivity, recessed silicon dioxide regions extending into the substrate and laterally enclosing at least one silicon substrate region of said one-type conductivity. Then, forming by ion implantation the first region of opposite-type conductivity which is fully enclosed laterally by said recessed silicon dioxide. This region is formed by directing a beam of ions of opposite-type conductivity impurity at said enclosed silicon region at such energy and dosage levels that the opposite conductivity-type impurity introduced into the substrate in said region will have a concentration peak at a point below the surface of this first region. Then, a region of said one-type conductivity is formed which extends from the surface into said first opposite-type conductivity region to a point between said concentration peak and said surface.