Patents by Inventor Amarjit Dhadda

Amarjit Dhadda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor wafer with reduced thickness variation and method for fabricating same
    Patent number: 8987898
    Abstract: According to one embodiment, a semiconductor wafer comprises a plurality of solder bumps for providing device contacts formed over a functional region of the semiconductor wafer, and one or more support rings surrounding the functional region. The one or more support rings and the plurality of solder bumps are formed so as to have substantially matching heights. The presence of the one or more support rings causes the semiconductor wafer to have a substantially uniform thickness in the functional region after a thinning process is performed on the semiconductor wafer. A method for fabricating the semiconductor wafer comprises forming the plurality of solder bumps over the functional region, and forming the one or more support rings surrounding the functional region before performing the thinning process on the semiconductor wafer.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: March 24, 2015
    Assignee: International Rectifier Corporation
    Inventors: Rupert Burbidge, David Paul Jones, Amarjit Dhadda, Robert Montgomery
  • Semiconductor Wafer with Reduced Thickness Variation and Method for Fabricating Same
    Publication number: 20120306072
    Abstract: According to one embodiment, a semiconductor wafer comprises a plurality of solder bumps for providing device contacts formed over a functional region of the semiconductor wafer, and one or more support rings surrounding the functional region. The one or more support rings and the plurality of solder bumps are formed so as to have substantially matching heights. The presence of the one or more support rings causes the semiconductor wafer to have a substantially uniform thickness in the functional region after a thinning process is performed on the semiconductor wafer. A method for fabricating the semiconductor wafer comprises forming the plurality of solder bumps over the functional region, and forming the one or more support rings surrounding the functional region before performing the thinning process on the semiconductor wafer.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Rupert Burbidge, David Paul Jones, Amarjit Dhadda, Robert Montgomery