Abstract: A heat spreader for an integrated circuit has a base portion and a top portion. The base portion is attachable to a surface of the integrated circuit, and has at least one channel extending therethrough. The top portion that is larger than the base portion such that the heat spreader is generally T-shaped in cross-section. The top portion has a hole at its center that extends from a top surface of the top portion to the at least one channel of the base portion. Mold compound is injected through the hole and out through the channels.

Abstract: A semiconductor package and method of forming the package, including a substrate having an opening formed therein. Contact pads are formed about a periphery of the opening on a first side of the substrate and a second opposing side of the substrate. A flip chip die is mounted to the substrate, having an active side mounted on a first side of the substrate and in electrical communication with at least some of the contact pads formed on the first side of the substrate. At least one wire bond die is mounted through the opening, with a non-active side mounted on the active side of the flip chip die. The wire bond die is in electrical communication with at least some of the plurality of contact pads formed on the second opposing side of the substrate.

Abstract: A heat spreader for an integrated circuit has a base portion and a top portion. The base portion is attachable to a surface of the integrated circuit, and has at least one channel extending therethrough. The top portion that is larger than the base portion such that the heat spreader is generally T-shaped in cross-section. The top portion has a hole at its center that extends from a top surface of the top portion to the at least one channel of the base portion. Mold compound is injected through the hole and out through the channels.

Abstract: A method of packaging a semiconductor die (10) includes providing a flip-chip die (10) with bump connections (12) on its bottom surface (14). An adhesive tape (18) is attached to a plate surface (16) and lead fingers (20) are formed on the tape (18). The die (10) is placed on the tape (18) such that the bumps (12) on the die (10) contact respective ones of the lead fingers (20) on the tape (18). A reflow process is performed on the die (10), the tape (18) and the plate (16), which forms C5 type interconnects. A mold compound (24) is formed over the die (10) and the tape (18), and then the tape (18) and the plate (16) are removed.

Abstract: A semiconductor package (100, 150, 200, 250), and method of forming the package, including a substrate (102, 102?, 202, 202?) having an opening (104, 104?, 204, 204?) formed therein. Contact pads (112, 112?, 212, 212?) are formed about a periphery of the opening on a first side of the substrate (106, 106?, 206, 206?) and a second opposing side (132, 132?, 232, 232?) of the substrate. A flip chip die (120, 120?, 220, 220?) is mounted to the substrate, having an active side (114, 114?, 214, 214?) mounted on a first side of the substrate and in electrical communication with at least some of the contact pads formed on the first side of the substrate. At least one wire bond die (110, 110?, 210, 210?) is mounted through the opening, with a non-active side mounted on the active side of the flip chip die. The wire bond die is in electrical communication with at least some of the plurality of contact pads formed on the second opposing side of the substrate.

Abstract: A method of packaging one or more semiconductor dice (10) includes providing a heat spreader (12) and attaching a first semiconductor die (10) to the heat spreader (12). A first set of bumps (14) is formed on respective die pads on a top surface (16) of the first die (10) and at least a second set of bumps (18) is formed on the first set of bumps (14) such that stacks of bumps (20) are formed on the top surface (16) of the first die (10). A molding process is performed such that a mold compound (24) is formed over the one or more dice (10), the stacks of bumps (20) and a portion of the heat spreader (12), which forms a semiconductor package (26).

Abstract: A method of packaging a semiconductor die (10) includes providing a flip-chip die (10) with bump connections (12) on its bottom surface (14). An adhesive tape (18) is attached to a plate surface (16) and lead fingers (20) are formed on the tape (18). The die (10) is placed on the tape (18) such that the bumps (12) on the die (10) contact respective ones of the lead fingers (20) on the tape (18). A reflow process is performed on the die (10), the tape (18) and the plate (16), which forms C5 type interconnects. A mold compound (24) is formed over the die (10) and the tape (18), and then the tape (18) and the plate (16) are removed.

Abstract: A method of making a stacked die package (50) includes attaching and electrically connecting a first integrated circuit (IC) die (52) to a base carrier (56). A plurality of successive layers (54A, 54B and 54C) of an adhesive material (54) is formed on the first die (52). A second die (72) is attached to the first die (52) with the adhesive material (54) such that the successive layers of adhesive material (54A, 54B and 54C) maintain a predetermined spacing (H) between the first die (52) and the second die (72). The second die (72) is electrically connected to the base carrier (56).

Abstract: An electrical connection for connecting multiple bonding pads of different devices. The electrical connection includes a first bonding pad on a first device and a bump disposed on the first bonding pad. A first wire is stitch bonded to the bump on the first device and electrically connected to a bonding pad of a second device. A second wire is ball bonded to the stitch bond of the first wire. The second wire is also electrically connected to a bonding pad of a third device. Thus, the second and third devices are connected to a single bonding pad of the first device. The size of the bonding pad is not unnecessarily increased to accommodate multiple wire bonds. Further, additional wires may be stitch bonded between the first stitch bond and the ball bond.

Abstract: A stacked multichip package (100) has a base carrier (102) having a top side (108) and a bottom side (110), a bottom integrated circuit die (104) having a bottom surface attached to the base carrier top side (108), and a top integrated circuit die (106 attached to a top surface of the bottom die (104). The top die (106) is attached to the bottom die (104) with a die attach material (118) having particles (120) blended therein is dispensed onto the top surface of the bottom die. The particles (120) blended into the die attach material (118) maintain a predetermined spacing between the bottom die and the top die so that wirebonds connecting the bottom die (104) to the base carrier (102) are not damaged when the top die (106) is attached to the bottom die (104).