Abstract: Described is a system for predicting multi-agent movements. A Radon Cumulative Distribution Transform (Radon-CDT) is applied to pairs of signature-formations representing agent movements. Canonical correlation analysis (CCA) components are identified for the pairs of signature-formations. Then, a relationship between the pairs of signature formations is learned using the CCA components. A counter signature-formation for a new dataset is predicted using the learned relationship and a new signature-formation. Control parameters of a device can be adjusted based on the predicted counter signature-formation.

Abstract: Described is a system for prediction of adversary movements. In an aspect, the system includes one or more processors and a memory, the memory being a non-transitory computer-readable medium having executable instructions encoded thereon, such that upon execution of the instructions, the one or more processors perform operations of computing relative positions of multiple objects of interest, generating a feature representation by forming a matrix based on the relative positions, predicting movement of the multiple objects of interest by applying clustering to the feature representation and by performing canonical correlation analysis, and controlling a device based on the predicted movement of the multiple objects of interest.

Abstract: Described is a system for predicting multi-agent movements. A Radon Cumulative Distribution Transform (Radon-CDT) is applied to pairs of signature-formations representing agent movements. Canonical correlation analysis (CCA) components are identified for the pairs of signature-formations. Then, a relationship between the pairs of signature formations is learned using the CCA components. A counter signature-formation for a new dataset is predicted using the learned relationship and a new signature-formation. Control parameters of a device can be adjusted based on the predicted counter signature-formation.

Abstract: Described is a system for prediction of adversary movements. In an aspect, the system includes one or more processors and a memory, the memory being a non-transitory computer-readable medium having executable instructions encoded thereon, such that upon execution of the instructions, the one or more processors perform operations of computing relative positions of multiple objects of interest, generating a feature representation by forming a matrix based on the relative positions, predicting movement of the multiple objects of interest by applying clustering to the feature representation and by performing canonical correlation analysis, and controlling a device based on the predicted movement of the multiple objects of interest.

Abstract: Described is a system for implicitly predicting movement of an object. In an aspect, the system includes one or more processors and a memory, the memory being a non-transitory computer-readable medium having executable instructions encoded thereon, such that upon execution of the instructions, the one or more processors perform operations of providing an image of a first trajectory to a predictive autoencoder, and using the predictive autoencoder, generating a predicted tactical response that comprises a second trajectory based on images of previous tactical responses that were used to train the predictive autoencoder, and controlling a device based on the predicted tactical response.

Abstract: In one implementation, a voltage converter includes a high side power switch, and first and second low side power switches. The voltage converter also includes a driver stage for driving the high side power switch and the first and second low side power switches, and an adaptive OFF-time control circuit coupled to the driver stage. The adaptive OFF-time control circuit is configured to sense a current through one of the first and second low side switches, and to determine an adaptive off time for the high side power switch based on the sensed current.

Abstract: According to an exemplary implementation, a voltage regulator includes an emulated ripple generator. The emulated ripple generator includes a high side switch configured to control charging of an emulated ripple. The emulated ripple generator further includes a low side switch configured to control discharging of the emulated ripple. The high side switch and the low side switch are configured to control the charging and the discharging such that the emulated ripple is substantially in-phase with an inductor current of the voltage regulator. The high side switch can be configured to control the charging by selectively enabling a high side current source. Furthermore, the low side switch can be configured to control the discharging by selectively enabling a low side current source.

Abstract: In one implementation, a circuit for producing an average output inductor current indicator in a voltage converter is configured to start a counter when a high side power switch turns on, to sense a sample current through an output inductor of the voltage converter after the high side power switch turns off and when a low side power switch is on, and to register a first count of the counter when the low side power switch turns off. The circuit is further configured to register a second count of the counter when the high side power switch subsequently turns on, and to produce the average output inductor current indicator based on the sample current and the first and second counts of the counter.

Abstract: According to one configuration, a power supply circuit includes an inductor, a monitor circuit, a storage resource, and a processor circuit. The inductor resides in a phase of the power supply and conveys current to a load. The monitor circuit monitors and samples the voltage of a node in the power supply. The voltage of the node may be a sawtooth or ramp waveform sampled by the monitor circuit. A magnitude of the voltage at the node varies depending on an amount of current passing through the inductor to the load. The monitor circuit initiates storage of at least one sample in a storage resource. A processor circuit utilizes the multiple sample voltages stored in the storage resource to produce a value indicative of the amount of average current conveyed through the inductor to the load.

Abstract: In one implementation, a voltage converter includes a high side power switch, and first and second low side power switches. The voltage converter also includes a driver stage for driving the high side power switch and the first and second low side power switches, and an adaptive OFF-time control circuit coupled to the driver stage. The adaptive OFF-time control circuit is configured to sense a current through one of the first and second low side switches, and to determine an adaptive off time for the high side power switch based on the sensed current.

Abstract: In one implementation, a circuit for producing an average output inductor current indicator in a voltage converter is configured to start a counter when a high side power switch turns on, to sense a sample current through an output inductor of the voltage converter after the high side power switch turns off and when a low side power switch is on, and to register a first count of the counter when the low side power switch turns off. The circuit is further configured to register a second count of the counter when the high side power switch subsequently turns on, and to produce the average output inductor current indicator based on the sample current and the first and second counts of the counter.

Abstract: According to one embodiment, a synchronous buck converter comprises a multi-mode control circuit for detecting a load condition of a variable load, an output stage driven by the multi-mode control circuit, wherein the variable load is coupled to the output stage, and a feedback circuit connected between the output stage and the multi-mode control circuit. The multi-mode control circuit is configured to adjust a current provided by the output stage to the variable load based on the load condition. In one embodiment, the multi-mode control circuit selectably uses one of at least a first control mode and a second control mode according to the load condition, wherein the first control mode is a pulse-width modulation (PWM) mode selected for switching efficiency when the load condition is heavy and the second control mode is an adaptive ON-time (AOT) mode selected for switching efficiency when the load condition is light.

Abstract: According to an exemplary implementation, a voltage regulator includes an emulated ripple generator. The emulated ripple generator includes a high side switch configured to control charging of an emulated ripple. The emulated ripple generator further includes a low side switch configured to control discharging of the emulated ripple. The high side switch and the low side switch are configured to control the charging and the discharging such that the emulated ripple is substantially in-phase with an inductor current of the voltage regulator. The high side switch can be configured to control the charging by selectively enabling a high side current source. Furthermore, the low side switch can be configured to control the discharging by selectively enabling a low side current source.

Abstract: According to one embodiment, a synchronous buck converter comprises a multi-mode control circuit for detecting a load condition of a variable load, an output stage driven by the multi-mode control circuit, wherein the variable load is coupled to the output stage, and a feedback circuit connected between the output stage and the multi-mode control circuit. The multi-mode control circuit is configured to adjust a current provided by the output stage to the variable load based on the load condition. In one embodiment, the multi-mode control circuit selectably uses one of at least a first control mode and a second control mode according to the load condition, wherein the first control mode is a pulse-width modulation (PWM) mode selected for switching efficiency when the load condition is heavy and the second control mode is an adaptive ON-time (AOT) mode selected for switching efficiency when the load condition is light.