Patents by Inventor Amirpouya Kavousian
Amirpouya Kavousian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11036246Abstract: An electronic circuit includes a differential amplifier, an output stage and a control circuit. The differential produces a signal proportional to a difference between a reference voltage and a voltage that is proportional to the output signal. The output stage includes multiple switchable circuits coupled between a voltage source and the output terminal such that the switching of the circuits changes impedance between the voltage source and the output terminal. The control circuit receives a feedback indicative of the voltage of the output signal and controls the impedance of the multiple switchable circuits such that current flowing out of the voltage source rises piecewise smoothly from power-on to steady state operation of the electronic circuit.Type: GrantFiled: September 14, 2018Date of Patent: June 15, 2021Assignee: Verily Life Sciences LLCInventor: Amirpouya Kavousian
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Patent number: 10554198Abstract: A clock calibration system is described herein. The clock calibration system may be implemented in a medical device to control timing of an action performed by the medical device. The clock calibration system may include a processing device coupled to a clock oscillator and a reference oscillator.Type: GrantFiled: January 4, 2018Date of Patent: February 4, 2020Assignee: VERILY LIFE SERVICES LLCInventors: Amirpouya Kavousian, Robert Wiser
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Patent number: 10476468Abstract: A device can include a thin-film bulk acoustic resonator (“FBAR”), a transceiver, a capacitor network, and a processor. The transceiver can transmit and receive radio frequency (“RF”) signals using the FBAR. The capacitor network can be conductively coupled to the FBAR. The processor can be in communication with the capacitor network. The processor can obtain a capacitor tuning code. The processor can further establish a capacitance of the capacitor network based on the capacitor tuning code during a RF receiving operation.Type: GrantFiled: June 8, 2018Date of Patent: November 12, 2019Assignee: VERILY LIFE SCIENCES LLCInventor: Amirpouya Kavousian
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Patent number: 10361630Abstract: Systems and methods for a reconfigurable DC-DC converter are disclosed. In one embodiment, a system includes: a capacitor; a first switch circuit electrically coupled in parallel to the capacitor; a second switch circuit electrically coupled in parallel to the capacitor; and a control circuit electrically coupled to the first switch circuit and the second switch circuit to switch the switch circuits at one of at least two different frequencies to convert an input voltage to an output voltage, wherein the control circuit controls the first switch circuit and second switch circuit to operate in a plurality of modes to output a desired current range.Type: GrantFiled: December 21, 2017Date of Patent: July 23, 2019Assignee: VERILY LIFE SCIENCES LLCInventor: Amirpouya Kavousian
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Patent number: 10218363Abstract: A circuit includes a reference clock terminal configured to receive a signal indicative of a reference clock, multiple low power oscillators (LPOs) and a controller. Each LPO is operable in at least one of three states including a sleep state in which the LPO is powered off, a calibration state in which the LPO undergoes calibration and an active mode in which the LPO is configured to provide a real-time clock based on the reference clock. The controller controls operation of the LPOs such that at most a single LPO is in the active state at any given time.Type: GrantFiled: July 19, 2018Date of Patent: February 26, 2019Assignee: Verily Life Sciences LLCInventor: Amirpouya Kavousian
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Patent number: 10097283Abstract: Example radio frequency (RF) transmitters and associated methods are disclosed. One example RF transmitter includes an RF oscillator, a real-time clock (RTC) oscillator. and a control circuit. The control circuit is configured to determine whether a calibration of the RF oscillator is needed; electrically couple the RF oscillator to the RTC oscillator and initiate calibrating of the RF oscillator using the RTC oscillator when it is determined that the calibration is needed; and activate the RF oscillator to operate in an open-loop mode to generate an RF signal for data transmission. The calibration can be performed in a closed-loop mode before the data transmission or in an open-loop mode during the data transmission.Type: GrantFiled: November 30, 2016Date of Patent: October 9, 2018Assignee: Verily Life Sciences LLCInventors: Daniel Yeager, Amirpouya Kavousian
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Patent number: 9698727Abstract: A two-walled coupled inductor includes an outer wall and an inner wall separated by a slit. The outer wall has a first width and the inner wall has a second width. The inner wall and the outer wall may be configured to be coupled to oscillator circuitry. The two-walled coupled inductor may include an electrically conductive stub coupled to the outer wall to be coupled to a power supply. A common mode current flows through the outer wall, and the stub if one is present, and a differential mode current flows through both the outer wall and the inner wall, but not the stub. The first and second widths, and dimensions of the stub, may be sized to increase an inductance of the common mode compared to an inductance of the differential mode, thereby reducing phase noise of the inductor-based resonator.Type: GrantFiled: December 10, 2015Date of Patent: July 4, 2017Assignee: QUALCOMM IncorporatedInventors: Alireza Khalili, Mazhareddin Taghivand, Amirpouya Kavousian
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Publication number: 20170170783Abstract: A two-walled coupled inductor includes an outer wall and an inner wall separated by a slit. The outer wall has a first width and the inner wall has a second width The inner wall and the outer wall may be configured to be coupled to oscillator circuitry. The two-walled coupled inductor may include an electrically conductive stub coupled to the outer wall to be coupled to a power supply. A common mode current flows through the outer wall, and the stub if one is present, and a differential mode current flows through both the outer wall and the inner wall, but not the stub. The first and second widths, and dimensions of the stub, may be sized to increase an inductance of the common mode compared to an inductance of the differential mode, thereby reducing phase noise of the inductor-based resonator.Type: ApplicationFiled: December 10, 2015Publication date: June 15, 2017Inventors: Alireza Khalili, Mazhareddin Taghivand, Amirpouya Kavousian
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Patent number: 9595935Abstract: A method and apparatus are disclosed for filtering a signal, such as a transmit communication signal with a configurable notch filter. The configurable notch filter may attenuate a set of frequencies near a selected notch frequency. In some embodiments, the configurable notch filter may include a variable resistor, a variable capacitor, a first inductor, and a second inductor. The variable resistor may be configured to compensate for resistive losses within the configurable notch filter. The variable capacitor may be configured to determine the set of frequencies to be attenuated.Type: GrantFiled: May 12, 2015Date of Patent: March 14, 2017Assignee: QUALCOMM IncorporatedInventors: Amirpouya Kavousian, Yashar Rajavi, Alireza Khalili, Mohammad Bagher Vahid Far
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Publication number: 20170019066Abstract: Certain aspects of the present disclosure provide techniques and apparatus for generating multiple oscillating signals. One example circuit generally includes a first voltage-controlled oscillator (VCO) having a first inductor and a second VCO having a second inductor in parallel with a third inductor, wherein the second and third inductors are disposed inside a loop of the first inductor and may behave as a magnetic dipole. The loop of the first inductor may be symmetrical, and a combined geometry of loops of the second and third inductors may be symmetrical. The coupling coefficient (k) between the first inductor and a combination of the second and third inductors may be small (e.g., k<0.01), due to the symmetrical geometry of the circuit layout. With a smaller k, the first and second VCOs' inductors may be placed closer to one another, thereby reducing an area consumed by the two VCOs.Type: ApplicationFiled: July 16, 2015Publication date: January 19, 2017Inventors: Mohammad FARAZIAN, Amirpouya KAVOUSIAN, Alireza KHALILI
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Patent number: 9548767Abstract: A multi-band amplifier may operate in a first frequency band and a second frequency band. The multi-band amplifier may include a first amplifier, a second amplifier, and a coupler. The coupler may couple a signal, such as a communication signal, to a selected amplifier. In some embodiments, the coupler may include one or more inductive elements to couple the signal to the first or the second amplifier. In some embodiments, the inductive elements may include a balun.Type: GrantFiled: November 4, 2014Date of Patent: January 17, 2017Assignee: QUALCOMM IncorporatedInventors: Abbas Komijani, Mohammad Bagher Vahid Far, Amirpouya Kavousian, Alireza Khalili, Yashar Rajavi, Lalitkumar Nathawad, Mohammad Mahdi Ghahramani
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Patent number: 9543892Abstract: Certain aspects of the present disclosure provide techniques and apparatus for generating multiple oscillating signals. One example circuit generally includes a first voltage-controlled oscillator (VCO) having a first inductor and a second VCO having a second inductor in parallel with a third inductor, wherein the second and third inductors are disposed inside a loop of the first inductor and may behave as a magnetic dipole. The loop of the first inductor may be symmetrical, and a combined geometry of loops of the second and third inductors may be symmetrical. The coupling coefficient (k) between the first inductor and a combination of the second and third inductors may be small (e.g., k<0.01), due to the symmetrical geometry of the circuit layout. With a smaller k, the first and second VCOs' inductors may be placed closer to one another, thereby reducing an area consumed by the two VCOs.Type: GrantFiled: July 16, 2015Date of Patent: January 10, 2017Assignee: Qualcomm IncorporatedInventors: Mohammad Farazian, Amirpouya Kavousian, Alireza Khalili
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Publication number: 20160336915Abstract: A method and apparatus are disclosed for filtering a signal, such as a transmit communication signal with a configurable notch filter. The configurable notch filter may attenuate a set of frequencies near a selected notch frequency. In some embodiments, the configurable notch filter may include a variable resistor, a variable capacitor, a first inductor, and a second inductor. The variable resistor may be configured to compensate for resistive losses within the configurable notch filter. The variable capacitor may be configured to determine the set of frequencies to be attenuated.Type: ApplicationFiled: May 12, 2015Publication date: November 17, 2016Inventors: Amirpouya Kavousian, Yashar Rajavi, Alireza Khalili, Mohammad Bagher Vahid Far
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Patent number: 9490784Abstract: A method, an apparatus, and a computer program product are provided. The apparatus outputs a sinusoidal signal according to a first clock frequency, generates, a first digital signal having a 25% duty cycle based on the sinusoidal signal, generates a second digital signal having a 25% duty cycle based on the sinusoidal signal, combines the first digital signal and the second digital signal to generate a combined digital signal having a 50% duty cycle and a second clock frequency that is double the first clock frequency, and doubles the second clock frequency of the combined digital signal to generate an output signal having a third clock frequency that is quadruple the first clock frequency. The apparatus further generates a first control voltage and a second control voltage for the first buffer and a third control voltage for the second buffer based on the output signal.Type: GrantFiled: March 6, 2015Date of Patent: November 8, 2016Assignee: QUALCOMM IncorporatedInventors: Mohammad Bagher Vahid Far, Alireza Khalili, Yashar Rajavi, Amirpouya Kavousian
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Publication number: 20160164507Abstract: A method, an apparatus, and a computer program product are provided. The apparatus outputs a sinusoidal signal according to a first clock frequency, generates, a first digital signal having a 25% duty cycle based on the sinusoidal signal, generates a second digital signal having a 25% duty cycle based on the sinusoidal signal, combines the first digital signal and the second digital signal to generate a combined digital signal having a 50% duty cycle and a second clock frequency that is double the first clock frequency, and doubles the second clock frequency of the combined digital signal to generate an output signal having a third clock frequency that is quadruple the first clock frequency. The apparatus further generates a first control voltage and a second control voltage for the first buffer and a third control voltage for the second buffer based on the output signal.Type: ApplicationFiled: March 6, 2015Publication date: June 9, 2016Inventors: Mohammad Bagher VAHID FAR, Alireza KHALILI, Yashar RAJAVI, Amirpouya KAVOUSIAN
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Publication number: 20160126983Abstract: A multi-band amplifier may operate in a first frequency band and a second frequency band. The multi-band amplifier may include a first amplifier, a second amplifier, and a coupler. The coupler may couple a signal, such as a communication signal, to a selected amplifier. In some embodiments, the coupler may include one or more inductive elements to couple the signal to the first or the second amplifier. In some embodiments, the inductive elements may include a balun.Type: ApplicationFiled: November 4, 2014Publication date: May 5, 2016Inventors: Abbas Komijani, Mohammad Bagher Vahid Far, Amirpouya Kavousian, Alireza Khalili, Yashar Rajavi
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Publication number: 20160099729Abstract: A method, an apparatus, and a computer program product are provided. The apparatus outputs a first sinusoidal signal and a second sinusoidal signal according to a first clock frequency, generates, a first digital signal having a 25% duty cycle based on the first sinusoidal signal, generates a second digital signal having a 25% duty cycle based on the second sinusoidal signal, combines the first digital signal and the second digital signal to generate a combined digital signal having a 50% duty cycle and a second clock frequency that is double the first clock frequency, and doubles the second clock frequency of the combined digital signal to generate an output signal having a third clock frequency that is quadruple the first clock frequency. The apparatus further generates a control voltage for the first buffer and the second buffer based on the combined digital signal.Type: ApplicationFiled: January 26, 2015Publication date: April 7, 2016Inventors: Yashar RAJAVI, Alireza KHALILI, Amirpouya KAVOUSIAN, Mohammad Mahdi GHAHRAMANI, Mohammad Bagher VAHID FAR
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Patent number: 9300249Abstract: A differential crystal oscillator circuit, including: first and second output terminals; a cross-coupled oscillation unit including first and second transistors cross-coupled to the first and second output terminals; first and second metal-oxide semiconductor field-effect transistor (MOSFET) diodes, each MOSFET diode including a resistor connected between gate and drain terminals, wherein the first MOSFET diode couples to the first transistor to provide low-impedance load at low frequencies and high-impedance load at higher frequencies to the first transistor, wherein the second MOSFET diode couples to the second transistor to provide low-impedance load at low frequencies and high-impedance load at higher frequencies to the second transistor; and a reference resonator coupled between the first and second output terminals to establish an oscillation frequency.Type: GrantFiled: July 22, 2014Date of Patent: March 29, 2016Assignee: QUALCOMM INCORPORATEDInventors: Yashar Rajavi, Amirpouya Kavousian, Alireza Khalili, Mohammad Bagher Vahid Far, Abbas Komijani
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Publication number: 20160028349Abstract: A differential crystal oscillator circuit, including: first and second output terminals; a cross-coupled oscillation unit including first and second transistors cross-coupled to the first and second output terminals; first and second metal-oxide semiconductor field-effect transistor (MOSFET) diodes, each MOSFET diode including a resistor connected between gate and drain terminals, wherein the first MOSFET diode couples to the first transistor to provide low-impedance load at low frequencies and high-impedance load at higher frequencies to the first transistor, wherein the second MOSFET diode couples to the second transistor to provide low-impedance load at low frequencies and high-impedance load at higher frequencies to the second transistor; and a reference resonator coupled between the first and second output terminals to establish an oscillation frequency.Type: ApplicationFiled: July 22, 2014Publication date: January 28, 2016Inventors: Yashar Rajavi, Amirpouya Kavousian, Alireza Khalili, Mohammad Bagher Vahid Far, Abbas Komijani
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Patent number: 9246435Abstract: A method and apparatus for charging a crystal oscillator are provided. A voltage generating module outputs a ramp voltage signal to a ring oscillator. The ring oscillator generates and outputs a waveform based on the ramp voltage signal. The ramp voltage signal facilitates the ring oscillator to output the waveform at a frequency that varies with time, wherein the varying frequency is within a frequency range of the crystal oscillator. An inverter generates a digital input signal based on the waveform. The digital input signal is sent to an input of the crystal oscillator for charging the crystal oscillator. A feedback module outputs a feedback signal based on the digital input signal, wherein the feedback signal controls the voltage generating module to generate a fixed voltage signal that facilitates the ring oscillator to output the waveform at a frequency that is equal to a resonance frequency of the crystal oscillator.Type: GrantFiled: February 9, 2015Date of Patent: January 26, 2016Assignee: QUALCOMM IncorporatedInventors: Amirpouya Kavousian, Yashar Rajavi, Alireza Khalili, Mohammad Bagher Vahid Far, Abbas Komijani