Abstract: A driver circuit for a PNP power transistor in an LDO regulator uses a Class AB (push-pull) buffer to supply the necessary base current to an NPN driver transistor, where the NPN driver transistor has its collector connected to the base of the PNP power transistor. A front end circuit of the driver, coupled to drive the Class AB buffer, uses a current diverting transistor, where a first portion of the current is used to control the pull-up transistor in the Class AB buffer, and the remainder of the current is used to control the pull-down transistor in the Class AB buffer, so the driver is very efficient. The portion of the driver circuit between the input of the driver circuit and the base of the NPN driver transistor is an inverting circuit. The driver can properly operate with an input voltage within two diode drops of ground.

Abstract: In an LDO regulator, two feedback loops are created. The first feedback loop includes a high power PNP bipolar power transistor connected in series between the input voltage Vin terminal and the output voltage Vout terminal. The first feedback loop includes a first error amplifier that controls a drive transistor to drive the base of the power transistor such that Vout matches a set voltage Vset. This first feedback loop circuitry uses an operating voltage (the upper rail voltage) that is regulated by a second feedback loop and is approximately 300 mV greater than Vout. As a result, the control circuitry will be powered by a low ripple supply to improve output PSRR. Further, the power transistor is connected such that any noise in the input voltage is a common mode voltage across the base-emitter of the transistor.

Abstract: A driver circuit for a PNP power transistor in an LDO regulator uses a Class AB (push-pull) buffer to supply the necessary base current to an NPN driver transistor, where the NPN driver transistor has its collector connected to the base of the PNP power transistor. A front end circuit of the driver, coupled to drive the Class AB buffer, uses a current diverting transistor, where a first portion of the current is used to control the pull-up transistor in the Class AB buffer, and the remainder of the current is used to control the pull-down transistor in the Class AB buffer, so the driver is very efficient. The portion of the driver circuit between the input of the driver circuit and the base of the NPN driver transistor is an inverting circuit. The driver can properly operate with an input voltage within two diode drops of ground.

Abstract: In an LDO regulator, two feedback loops are created. The first feedback loop includes a high power PNP bipolar power transistor connected in series between the input voltage Vin terminal and the output voltage Vout terminal. The first feedback loop includes a first error amplifier that controls a drive transistor to drive the base of the power transistor such that Vout matches a set voltage Vset. This first feedback loop circuitry uses an operating voltage (the upper rail voltage) that is regulated by a second feedback loop and is approximately 300 mV greater than Vout. As a result, the control circuitry will be powered by a low ripple supply to improve output PSRR. Further, the power transistor is connected such that any noise in the input voltage is a common mode voltage across the base-emitter of the transistor.