Patents by Inventor Amol V. Bhinge
Amol V. Bhinge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160092329Abstract: Provided are a system and method for generating final result checking for a test case. A test case is executed for a coherent memory system having a processor core. An event log is generated for the processor core. The event log is analyzed. The test case for the core is annotated with a checker for performing expected data checking for physical addresses modified by the processor core.Type: ApplicationFiled: September 29, 2014Publication date: March 31, 2016Applicant: FREESCALE SEMICONDUCTOR INC.Inventors: Aditya Musunuri, Amol V. Bhinge
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Patent number: 9286180Abstract: Provided are a system and method for generating final result checking for a test case. A test case is executed for a coherent memory system having a processor core. An event log is generated for the processor core. The event log is analyzed. The test case for the core is annotated with a checker for performing expected data checking for physical addresses modified by the processor core.Type: GrantFiled: September 29, 2014Date of Patent: March 15, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Aditya Musunuri, Amol V. Bhinge
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Patent number: 8490046Abstract: An approach is provided that receives a correlation data structure from a memory. The correlation data structure indicates a number of expected test event triggers that correspond to a test case that includes a number of test events. The test case is executed by a computer processor, the execution resulting in one or more resultant data structures stored in the memory. The resultant data structures indicate one or more actual test event triggers that occurred during the execution. A base key value is generated corresponding to each of the resultant data structures. A scalar array is searched for the base key values. In response to finding base key values, a counter corresponding to the base key values is incremented. However, if base key values are not found in the scalar array, then the base key values are added to the scalar array and the added entries are initialized.Type: GrantFiled: August 23, 2012Date of Patent: July 16, 2013Assignee: Freescale Semiconductor, Inc.Inventor: Amol V. Bhinge
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Patent number: 8352428Abstract: An approach is provided that receives a file request and maintains a set of file versions of the requested file on a network-accessible storage media. The file versions are retrieved from the network accessible storage media along with expected hash values corresponding to each of the file versions. The retrieved file versions are stored in a second nonvolatile storage media, such as a local nonvolatile storage. File versions are selected from newest to oldest. When a file version is selected, a hash value is computed for the file and this hash value is compared to the expected hash value that corresponds to the selected file version. The first (newest) file version with a hash value that matches the expected hash value is selected and returned to the requestor.Type: GrantFiled: December 7, 2009Date of Patent: January 8, 2013Assignee: Freescale Semiconductor, Inc.Inventors: George W. Wood, Amol V. Bhinge
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Publication number: 20120317534Abstract: An approach is provided that receives a correlation data structure from a memory. The correlation data structure indicates a number of expected test event triggers that correspond to a test case that includes a number of test events. The test case is executed by a computer processor, the execution resulting in one or more resultant data structures stored in the memory. The resultant data structures indicate one or more actual test event triggers that occurred during the execution. A base key value is generated corresponding to each of the resultant data structures. A scalar array is searched for the base key values. In response to finding base key values, a counter corresponding to the base key values is incremented. However, if base key values are not found in the scalar array, then the base key values are added to the scalar array and the added entries are initialized.Type: ApplicationFiled: August 23, 2012Publication date: December 13, 2012Inventor: Amol V. Bhinge
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Patent number: 8255861Abstract: An approach is provided that receives a correlation data structure from a memory. The correlation data structure indicates a number of expected test event triggers that correspond to a test case that includes a number of test events. The test case is executed by a computer processor, the execution resulting in one or more resultant data structures stored in the memory. The resultant data structures indicate one or more actual test event triggers that occurred during the execution. The expected test event triggers are compared to the actual test event triggers. If the comparison reveals one or more mismatches, a trigger mismatch notification is provided to a user of the computer.Type: GrantFiled: October 21, 2010Date of Patent: August 28, 2012Assignee: Freescale Semiconductor, Inc.Inventor: Amol V. Bhinge
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Patent number: 8161449Abstract: A method, computer program product, and data processing system that controls test packets that are sent to a coordinating computer system is provided. A node computer system runs a test case that results in one or more test result packets. Control data structures are received from one or more coordinating computer systems. The resulting test result packets are compared to the one or more received data structures. The comparison reveals whether one or more of the test result packets include results requested by the coordinating computer systems. Test result packets are selected when the comparison reveals that the selected test result packets include results requested by the coordinating computer systems. Selected test result packets are sent to one of the coordinating computer systems and unselected test result packets are discarded by the node.Type: GrantFiled: October 21, 2009Date of Patent: April 17, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Amol V. Bhinge, George W. Wood, Hillel Miller
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Patent number: 7900183Abstract: A method, computer program product, and data processing system for combining results regarding test sequences' coverage of events in testing a plurality of related semiconductor designs are disclosed. Test patterns are randomly generated by one or more “frontend” computers. Results from applying these patterns to the designs under test are transmitted to a “backend” computer in the form of an ordered dictionary of events and bitmap and/or countmap data structures. The backend computer combines results from each test sequence in a cumulative fashion to measure the overall coverage of the set of test sequences over the plurality of designs.Type: GrantFiled: July 3, 2008Date of Patent: March 1, 2011Assignee: Freescale Semiconductor, Inc.Inventor: Amol V. Bhinge
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Publication number: 20110035631Abstract: An approach is provided that receives a correlation data structure from a memory. The correlation data structure indicates a number of expected test event triggers that correspond to a test case that includes a number of test events. The test case is executed by a computer processor, the execution resulting in one or more resultant data structures stored in the memory. The resultant data structures indicate one or more actual test event triggers that occurred during the execution. The expected test event triggers are compared to the actual test event triggers. If the comparison reveals one or more mismatches, a trigger mismatch notification is provided to a user of the computer.Type: ApplicationFiled: October 21, 2010Publication date: February 10, 2011Inventor: Amol V. Bhinge
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Publication number: 20100088278Abstract: An approach is provided that receives a file request and maintains a set of file versions of the requested file on a network-accessible storage media. The file versions are retrieved from the network accessible storage media along with expected hash values corresponding to each of the file versions. The retrieved file versions are stored in a second nonvolatile storage media, such as a local nonvolatile storage. File versions are selected from newest to oldest. When a file version is selected, a hash value is computed for the file and this hash value is compared to the expected hash value that corresponds to the selected file version. The first (newest) file version with a hash value that matches the expected hash value is selected and returned to the requestor.Type: ApplicationFiled: December 7, 2009Publication date: April 8, 2010Inventors: George W. Wood, Amol V. Bhinge
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Publication number: 20100042959Abstract: A method, computer program product, and data processing system that controls test packets that are sent to a coordinating computer system is provided. A node computer system runs a test case that results in one or more test result packets. Control data structures are received from one or more coordinating computer systems. The resulting test result packets are compared to the one or more received data structures. The comparison reveals whether one or more of the test result packets include results requested by the coordinating computer systems. Test result packets are selected when the comparison reveals that the selected test result packets include results requested by the coordinating computer systems. Selected test result packets are sent to one of the coordinating computer systems and unselected test result packets are discarded by the node.Type: ApplicationFiled: October 21, 2009Publication date: February 18, 2010Inventors: Amol V. Bhinge, George W. Wood, Hillel Miller
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Publication number: 20080270865Abstract: A method, computer program product, and data processing system for combining results regarding test sequences' coverage of events in testing a plurality of related semiconductor designs are disclosed. Test patterns are randomly generated by one or more “frontend” computers. Results from applying these patterns to the designs under test are transmitted to a “backend” computer in the form of an ordered dictionary of events and bitmap and/or countmap data structures. The backend computer combines results from each test sequence in a cumulative fashion to measure the overall coverage of the set of test sequences over the plurality of designs.Type: ApplicationFiled: July 3, 2008Publication date: October 30, 2008Inventor: Amol V. Bhinge
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Patent number: 7409654Abstract: A method, computer program product, and data processing system for minimizing the number of test sequences needed to achieve a desired level of coverage of events in testing a semiconductor design is disclosed. Test patterns are randomly generated by one or more “frontend” computers. Results from applying these patterns to the design under test are transmitted to a “backend” computer for processing. A determination is made as to which test sequences trigger events not already triggered by previously-considered test sequences. An autograde data structure is generated which further reduces the number of test sequences. A preferred embodiment of the present invention may be used to reduce the number of test sequences required, but may also be used to provide test engineers a basis for devising manually-created test sequences to test related events.Type: GrantFiled: October 17, 2005Date of Patent: August 5, 2008Assignee: Freescale Semiconductor, Inc.Inventors: George W. Wood, Amol V. Bhinge
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Patent number: 7308658Abstract: A method, computer program product, and data processing system for determining test sequences' coverage of events in testing a semiconductor design are disclosed. Test patterns are randomly generated by one or more “frontend” computers. Results from applying these patterns to the design under test are transmitted to a “backend” computer in the form of an ordered dictionary of events and bitmap and/or countmap data structures. A “bitmap” data structure encodes Boolean information regarding whether or not a given event was covered by a particular test sequence. A “countmap” data structure includes frequency information indicating how many times a given event was triggered by a particular test sequence. The backend computer combines results from each test sequence in a cumulative fashion to measure the overall coverage of the set of test sequences.Type: GrantFiled: October 17, 2005Date of Patent: December 11, 2007Assignee: Freescale Semiconductor, Inc.Inventors: George W. Wood, Amol V. Bhinge