Patents by Inventor Amrit Singh
Amrit Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11954554Abstract: Methods and systems for identifying and accurately monitoring evaporation from casks storing high value liquor are presented herein. A Cask Identification and Evaporation Monitoring (CIEM) system includes instrumentation to identify cask location within a high volume storage facility and monitor loss of content from each cask. The resulting data is communicated to a CIEM tracking server for storage and further analysis. The CIEM tracking server identifies excessive short term losses, e.g., leaks, arising anywhere in the storage facility. In addition, the CIEM tracking server identifies long term loss trends. The long term loss trends are enable data-driven management of the cask conditioning process, including tasks such as scheduling of cask rotation within the storage facility, bottling, etc.Type: GrantFiled: June 4, 2022Date of Patent: April 9, 2024Assignee: DT Whisky Solutions, Inc.Inventors: Amrit Singh, Shawn B. Smith, Nagendra Palle
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Publication number: 20230382466Abstract: A spray mist suppressor removes spray mist generated behind one or more vehicle wheels once running along a wetted surface under spray mist generating conditions. The apparatus includes an intake duct having an intake inlet end and an intake outlet end, and a transition duct in environmental communication with the intake duct. The transition duct has a transition inlet end and a transition outlet end, wherein the transition duct has a cross-sectional area that is greater at the transition inlet end than at a location between the transition inlet end and the transition outlet end. The transition duct is configured to implement a Venturi effect to reduce a static pressure of a fluid within the transition duct flowing from the transition inlet end to the transition outlet end relative to a static pressure of the fluid outside of the transition duct.Type: ApplicationFiled: May 30, 2022Publication date: November 30, 2023Inventor: Amrit Singh
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Publication number: 20230126019Abstract: Methods and systems for accurately and securely dispensing high value beverages are presented herein. A beverage distribution system includes one or more replaceable beverage cartridges mounted to a beverage dispensing device. Each of the beverage cartridges includes a fluid reservoir with an output port, an output control valve, a flowmeter, and a local controller. The local controller receives signals from the flow meter and determines a cumulative amount of beverage fluid dispensed from the beverage cartridge based on the received signals. In one embodiment, the beverage dispensing device includes a fluid pump and a master controller. The master controller also estimates the cumulative amount of beverage fluid dispensed from each beverage cartridge based on control commands communicated to each beverage cartridge. If a difference between the estimated cumulative amounts of fluid dispensed from a beverage cartridge exceeds a predetermined threshold value, an alert is generated.Type: ApplicationFiled: October 26, 2022Publication date: April 27, 2023Inventors: Amrit Singh, Nirmal Chudgar, Shawn B. Smith, Nagendra Palle
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Publication number: 20220303310Abstract: Embodiments of the present disclosure relate to a method, apparatus and computer readable storage media for processing an Internet Protocol Security (IPsec) stream. A method comprises determining a security association for an incoming stream, the incoming streaming comprising a plurality of packets; performing pre-processing on the plurality of packets based on the security association; and in response to the pre-processing being performed on at least one of the plurality of packets, performing parallel processing on the at least one of the plurality of packets.Type: ApplicationFiled: March 8, 2022Publication date: September 22, 2022Inventors: Gaurang Suryakant THAKKAR, Amrit Singh CHANDOK, Govind RAJAGURI
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Publication number: 20110244928Abstract: Remote assistance for users of hands-free communications devices is provided as a service. A user registers a hands-free communications device and the user. The service is requested in instances either automatically, upon notification that a trigger has been initiated, or upon request of the user. An agent is notified to contact the user and, upon obtaining authorization from the user of the hands-free communications device for which the service trigger has been automatically activated, the agent takes control remotely of at least one application on the hands-free communications device for which the service trigger has been initiated.Type: ApplicationFiled: January 24, 2011Publication date: October 6, 2011Inventors: Peter Louis CHERPES, Guru Amrit Singh KHALSA
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Patent number: 7613981Abstract: A system and method for reducing power consumption in a Low Density Parity-Check Code (LDPC) decoder includes a sleep mode checking module and a gating circuit. The sleep mode checking module checks whether a check node is in sleep mode. The check node is considered to be in sleep mode when the absolute value of the message going to each of the one or more bit nodes corresponding to the check node is greater than a threshold value. The gating circuit turns OFF a Check Node and Bit Node Update Unit (CNBNU) associated with the check node when the check node is in the sleep mode. Turning OFF a CNBNU stops the exchange of messages between the check node and its corresponding one or more bit nodes.Type: GrantFiled: September 6, 2007Date of Patent: November 3, 2009Assignee: Freescale Semiconductor, Inc.Inventors: Rahul Garg, Amrit Singh
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Patent number: 7421610Abstract: A clock generation circuit for an integrated circuit device, such as an SOC, has increased test coverage. The clock generation circuit includes first and second latches that receive an input clock signal at their clock inputs and a selector that receives at first and second data inputs respectively, the input clock signal and an output of the second latch circuit, which is a divided clock signal. A logic gate has a first input connected to an output of the first latch and a second input that receives a scan mode signal. The logic gate generates a selector control signal provided to the selector.Type: GrantFiled: March 6, 2006Date of Patent: September 2, 2008Assignee: Freescale Semiconductor, Inc.Inventors: Arnab K. Mitra, Amrit Singh, Nitin Vig
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Publication number: 20080086671Abstract: A system and method for reducing power consumption in a Low Density Parity-Check Code (LDPC) decoder includes a sleep mode checking module and a gating circuit. The sleep mode checking module checks whether a check node is in sleep mode. The check node is considered to be in sleep mode when the absolute value of the message going to each of the one or more bit nodes corresponding to the check node is greater than a threshold value. The gating circuit turns OFF a Check Node and Bit Node Update Unit (CNBNU) associated with the check node when the check node is in the sleep mode. Turning OFF a CNBNU stops the exchange of messages between the check node and its corresponding one or more bit nodes.Type: ApplicationFiled: September 6, 2007Publication date: April 10, 2008Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Rahul GARG, Amrit Singh
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Publication number: 20070201586Abstract: A method and system for decoding a data symbol sequence that has been previously encoded using one or more unique code word polynomials in which at least one unique code word polynomial is used more than once. A set of 2d-1 unique branch metrics is computed, using the unique code word polynomials, where d is the number of unique code word polynomials. The computed set of 2d-1 unique branch metrics is stored in a memory. Path metrics are then calculated, based on the stored set of 2d-1 unique branch metrics. A decoded data symbol sequence is generated based on the computed path metrics.Type: ApplicationFiled: May 2, 2007Publication date: August 30, 2007Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Mohit Prasad, Gaurav Davra, Arnab Mitra, Amrit Singh, Nitin Vig
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Publication number: 20070022312Abstract: A clock generation circuit for an integrated circuit device, such as an SOC, has increased test coverage. The clock generation circuit includes first and second latches that receive an input clock signal at their clock inputs and a selector that receives at first and second data inputs respectively, the input clock signal and an output of the second latch circuit, which is a divided clock signal. A logic gate has a first input connected to an output of the first latch and a second input that receives a scan mode signal. The logic gate generates a selector control signal provided to the selector.Type: ApplicationFiled: March 6, 2006Publication date: January 25, 2007Inventors: Arnab Mitra, Amrit Singh, Nitin Vig
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Publication number: 20060168502Abstract: A Maximum Likelihood Sequence Estimation (MLSE) decoder that decodes an encoded sequence of data symbols includes a branch metric unit for computing branch metrics for each trellis stage of the encoded sequence, a path metric unit for computing a path metric for each trellis stage using the computed branch metrics, and an M-at-a-time traceback unit for performing an M-at-a-time traceback operation using the computed path metrics. The M-at-a-time traceback operation generates M decoded data symbols in a single M-at-a-time traceback operation.Type: ApplicationFiled: January 21, 2005Publication date: July 27, 2006Inventors: Mohit Prasad, Nitin Vig, Arnab Mitra, Amrit Singh, Gaurav Davra
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Publication number: 20060020875Abstract: A method and system for decoding a data symbol sequence that has been previously encoded using one or more unique code word polynomials in which at least one unique code word polynomial is used more than once. A set of 2d-1 unique branch metrics is computed, using the unique code word polynomials, where d is the number of unique code word polynomials. The computed set of 2d-1 unique branch metrics is stored in a memory. Path metrics are then calculated, based on the stored set of 2d-1 unique branch metrics. A decoded data symbol sequence is generated based on the computed path metrics.Type: ApplicationFiled: July 21, 2004Publication date: January 26, 2006Inventors: Mohit Prasad, Gaurav Davra, Arnab Mitra, Amrit Singh, Nitin Vig
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Patent number: 6197288Abstract: This invention pertains to a malodor counteractant composition comprising a malodor counteractant agent in an oral vehicle. The malodor counteractant agent is selected from the group consisting of, in percentages by weight: (A) (a) geranyl propionate; (b) benzyl benzoate; and (c) neryl acetate; (B) (a) citronellyl acetate; (b) benzyl benzoate; and (c) neryl acetate; (C) (a) benzyl benzoate; (b) geranyl propionate; and (c) citronellyl acetate; (D) (a) geranyl propionate; (b) citronellyl acetate; and (c) benzyl benzoate; (E) (a) citronellyl acetate; and (b) geranyl propionate; (F) (a) benzyl benzoate; and (b) neryl acetate; (G) (a) benzyl benzoate; (b) neryl acetate; (c) trimethyl (2,6,6) vinyl(6) tetrahydropyran; (d) citronella oil; and (e) and ethyl alcohol; and (H) (a) benzyl benzoate; (b) neryl acetate; (c) citronella oil; (d) geranyl acetate; (e) alpha ionone; (f) geranyl propionate; (g) linalool; and (e) and ethyl alcohol.Type: GrantFiled: October 16, 1997Date of Patent: March 6, 2001Assignee: Bush Boake Allen, Inc.Inventor: Amrit Singh Mankoo