Patents by Inventor Amruthavalli Palla ALUR

Amruthavalli Palla ALUR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10553453
    Abstract: Various embodiments of the disclosure are directed to a semiconductor package and a method for fabrication of the semiconductor package. Further, disclosed herein are systems and methods that are directed to using a photoimagable dielectric (PID) layer with substantially similar mechanical properties as that of a mold material. The disclosure can be used, for example, in the context of bumpless laserless embedded substrate structures (BLESS) technology for wafer/panel level redistribution layer (RDL) and/or fan-out packaging applications. The disclosed embodiments may reduce the need for multiple dry resist film (DFR) lamination steps during various processing steps for semiconductor packaging and can also facilitate multiple layer counts due to the availability of thin PID materials.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: February 4, 2020
    Assignee: Intel Corporation
    Inventors: Sri Chaitra Chavali, Siddharth K. Alur, Amanda E. Schuckman, Amruthavalli Palla Alur, Islam A. Salama, Yikang Deng, Kristof Darmawikarta
  • Publication number: 20190311916
    Abstract: Various embodiments of the disclosure are directed to a semiconductor package and a method for fabrication of the semiconductor package. Further, disclosed herein are systems and methods that are directed to using a photoimageable dielectric (PID) layer with substantially similar mechanical properties as that of a mold material. The disclosure can be used, for example, in the context of bumpless laserless embedded substrate structures (BLESS) technology for wafer/panel level redistribution layer (RDL) and/or fan-out packaging applications. The disclosed embodiments may reduce the need for multiple dry resist film (DFR) lamination steps during various processing steps for semiconductor packaging and can also facilitate multiple layer counts due to the availability of thin PID materials.
    Type: Application
    Filed: July 14, 2016
    Publication date: October 10, 2019
    Inventors: Sri Chaitra CHAVALI, Siddharth K. ALUR, Amanda E. SCHUCKMAN, Amruthavalli Palla ALUR, Islam A. SALAMA, Yikang DENG, Kristof DARMAWIKARTA