Patents by Inventor Amul DESAI
Amul DESAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10861559Abstract: A methodology and structure for selectively erases a group of strings in a vertical NAND memory array to account for the slow to erase memory cells in the inner strands compared to the outer strands in the group. Erase signals can be applied through both the drain side connections and the source side connections in a first step to erase the outer strings. A second erase signal can be applied to the inner strands to erase the inner strands. The second signal can be applied from just the drain side connections or through both the drain side connections and the source side connections. In another embodiment, the erase signals are applied from both the source side connections and the drain side connections to the inner strings and only from the source side connections to the outer strings.Type: GrantFiled: December 20, 2019Date of Patent: December 8, 2020Assignee: SanDisk Technologies LLCInventors: Amul Desai, Jayavel Pachamuthu
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Patent number: 10229744Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of the memory cells can shift depending on the coupled up state of the word lines. In one approach, for a read operation, a representative word line voltage in a block is detected and a corresponding set of read voltages is selected. In another approach, a pre-read voltage pulse is applied to a selected word line in response to a read command, just prior to reading the selected cells. In another approach, a voltage pulse is periodically applied to each word line in a block to provide the word lines in a coupled up state. In another approach, a soft erase is performed after a read operation to prevent coupling up of the word lines.Type: GrantFiled: November 17, 2017Date of Patent: March 12, 2019Assignee: SanDisk Technologies LLCInventors: Deepanshu Dutta, Idan Alrod, Huai-Yuan Tseng, Amul Desai, Jun Wan, Ken Cheah, Sarath Puthenthermadam
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Patent number: 10090057Abstract: Apparatuses, systems, methods, and computer program products are disclosed for dynamic strobe timing. A controller is configured to generate a strobe signal to facilitate data transfer. A controller is configured to receive a feedback signal in response to initiation of a strobe signal. A controller is configured to control a duration of a strobe signal based on a feedback signal.Type: GrantFiled: February 23, 2017Date of Patent: October 2, 2018Assignee: SANDISK TECHNOLOGIES LLCInventors: Amul Desai, Khanh Nguyen
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Publication number: 20180254090Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of the memory cells can shift depending on the coupled up state of the word lines. In one approach, for a read operation, a representative word line voltage in a block is detected and a corresponding set of read voltages is selected. In another approach, a pre-read voltage pulse is applied to a selected word line in response to a read command, just prior to reading the selected cells. In another approach, a voltage pulse is periodically applied to each word line in a block to provide the word lines in a coupled up state. In another approach, a soft erase is performed after a read operation to prevent coupling up of the word lines.Type: ApplicationFiled: November 17, 2017Publication date: September 6, 2018Applicant: SanDisk Technologies LLCInventors: Deepanshu Dutta, Idan Alrod, Huai-Yuan Tseng, Amul Desai, Jun Wan, Ken Cheah, Sarath Puthenthermadam
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Publication number: 20180240526Abstract: Apparatuses, systems, methods, and computer program products are disclosed for dynamic strobe timing. A controller is configured to generate a strobe signal to facilitate data transfer. A controller is configured to receive a feedback signal in response to initiation of a strobe signal. A controller is configured to control a duration of a strobe signal based on a feedback signal.Type: ApplicationFiled: February 23, 2017Publication date: August 23, 2018Applicant: SanDisk Technologies LLCInventors: Amul Desai, Khanh Nguyen
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Patent number: 10026486Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of the memory cells can shift depending on the coupled up state of the word lines. In one approach, for a read operation, a representative word line voltage in a block is detected and a corresponding set of read voltages is selected. In another approach, a pre-read voltage pulse is applied to a selected word line in response to a read command, just prior to reading the selected cells. In another approach, a voltage pulse is periodically applied to each word line in a block to provide the word lines in a coupled up state. In another approach, a soft erase is performed after a read operation to prevent coupling up of the word lines.Type: GrantFiled: March 6, 2017Date of Patent: July 17, 2018Assignee: SanDisk Technologies LLCInventors: Deepanshu Dutta, Idan Alrod, Huai-Yuan Tseng, Amul Desai, Jun Wan, Ken Cheah, Sarath Puthenthermadam
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Patent number: 9959915Abstract: The present disclosure describes a system, a circuit, and method for process and temperature compensation in an integrated circuit. For example, the system includes a bus, a data latch, and a voltage generator. The data latch includes a plurality of transistors coupled to the bus. The voltage generator includes a tracking transistor with one or more physical characteristics that substantially match one or more respective physical characteristics—e.g., gate width and gate length dimensions—of at least one of the plurality of transistors in the data latch. The voltage generator is configured to adjust a pre-charged voltage on the bus based on an electrical characteristic of the tracking transistor.Type: GrantFiled: May 11, 2016Date of Patent: May 1, 2018Assignee: SanDisk Technologies LLCInventors: Amul Desai, Hao Nguyen, Man Mui, Ohwon Kwon
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Publication number: 20170169867Abstract: The present disclosure describes a system, a circuit, and method for process and temperature compensation in an integrated circuit. For example, the system includes a bus, a data latch, and a voltage generator. The data latch includes a plurality of transistors coupled to the bus. The voltage generator includes a tracking transistor with one or more physical characteristics that substantially match one or more respective physical characteristics—e.g., gate width and gate length dimensions—of at least one of the plurality of transistors in the data latch. The voltage generator is configured to adjust a pre-charged voltage on the bus based on an electrical characteristic of the tracking transistor.Type: ApplicationFiled: May 11, 2016Publication date: June 15, 2017Applicant: SanDisk Technologies, LLCInventors: Amul DESAI, Hao Nguyen, Man Mui, Ohwon Kwon